Patents by Inventor Ishing Lou

Ishing Lou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6777171
    Abstract: A method of forming a silicon carbide layer, a silicon nitride layer, an organosilicate layer is disclosed. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a fluorine source in the presence of an electric field. The silicon nitride layer is formed by reacting a gas mixture comprising a silicon source, a nitrogen source, and a fluorine source in the presence of an electric field. The organosilicate layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, an oxygen source and a fluorine source in the presence of an electric field. The silicon carbide layer, the silicon nitride layer and the organosilicate layer are all compatible with integrated circuit fabrication processes.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: August 17, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Ping Xu, Jia Lee, Ishing Lou, Li-Qun Xia
  • Publication number: 20020155386
    Abstract: A method of forming a silicon carbide layer, a silicon nitride layer, an organosilicate layer is disclosed. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a fluorine source in the presence of an electric field. The silicon nitride layer is formed by reacting a gas mixture comprising a silicon source, a nitrogen source, and a fluorine source in the presence of an electric field. The organosilicate layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, an oxygen source and a fluorine source in the presence of an electric field. The silicon carbide layer, the silicon nitride layer and the organosilicate layer are all compatible with integrated circuit fabrication processes.
    Type: Application
    Filed: April 20, 2001
    Publication date: October 24, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Ping Xu, Jia Lee, Ishing Lou, Li-Qun Xia
  • Patent number: 6153540
    Abstract: A method and apparatus for controlling the wet-etch rate and thickness uniformity of a dielectric layer, such as a phosphosilicate glass layer (PSG) layer. The method is based upon the discovery that the atmospheric pressure at which a PSG layer is deposited affects the wet-etch rate of the same, during a subsequent processing step, as well as the layer's thickness uniformity. As a result, the method of the present invention includes the step of pressurizing the atmospheric pressure of a semiconductor process chamber within a predetermined range after the substrate is deposited therein. Flowed into the deposition zone is a process gas comprising a silicon source, all oxygen source, and a phosphorous source; and maintaining the deposition zone at process conditions suitable for depositing a phosphosilicate glass layer on the substrate.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: November 28, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Ishing Lou, Cary Ching, Peter W. Lee, Rong Pan, Paul Gee, Francimar Campana