Patents by Inventor Ishita Ghosh

Ishita Ghosh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11872212
    Abstract: The invention provides non-centrosymmetric organic crystals which show exceptional self-healing properties. More particularly, the present invention provides non-centrosymmetric substituted imidazole and Dialkyl 4,4?-methylenebis(azanediyl)dibenzoate Crystals and a process for preparation thereof. These highly crystalline materials, when broken into pieces, can self-propel and re-join in the blink of an eye and repair themselves so precisely that they become indistinguishable from the undisturbed materials.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: January 16, 2024
    Assignee: Indian Institute of Science Education and Research (IISER) Kolkata
    Inventors: Chilla Malla Reddy, Surojit Bhunia, Rituparno Chowdhury, Ishita Ghosh
  • Publication number: 20230051178
    Abstract: The invention provides non-centrosymmetric organic crystals which show exceptional self-healing properties. More particularly, the present invention provides non-centrosymmetric substituted imidazole and Dialkyl 4,4?-methylenebis(azanediyl)dibenzoate Crystals and a process for preparation thereof. These highly crystalline materials, when broken into pieces, can self-propel and re-join in the blink of an eye and repair themselves so precisely that they become indistinguishable from the undisturbed materials.
    Type: Application
    Filed: July 26, 2022
    Publication date: February 16, 2023
    Inventors: Chilla Malla REDDY, Surojit BHUNIA, Rituparno CHOWDHURY, Ishita GHOSH
  • Patent number: 10296673
    Abstract: For generating code for simulation of a circuit design, a hardware description language (HDL) description and a high-level language (HLL) description of portions of the circuit design are input. The HLL description specifies a first function and the HDL description includes a call to the first function. A wrapper is generated for the first function. The wrapper has an associated stack frame and includes code that stores in the stack frame values of arguments specified by the call to the first function and code that calls the first function. An HLL simulation specification is generated from the HDL description. The HLL simulation specification includes a call to the first HLL wrapper in place of the call to the first function. The HLL simulation specification, the first HLL wrapper, and the HLL description are compiled into executable program code.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: May 21, 2019
    Assignee: XILINX, INC.
    Inventors: Ishita Ghosh, Hem C. Neema, Jason Villarreal, Saikat Bandyopadhyay, Kumar Deepak
  • Patent number: 9223910
    Abstract: A method for compiling an HDL specification for simulation of a circuit design is disclosed. The circuit design is elaborated from the HDL specification and memory locations are allocated for formals and actuals of the elaborated circuit design. For each port having a formal and an actual that are compatible, the allocating of memory locations sets a reference pointer for the formal and a reference pointer for the actual to reference a same one of the memory locations. For each port having a formal and an actual that are incompatible, the allocating of memory locations sets the reference pointer for the formal and the reference pointer for the actual to reference different respective ones of the memory locations. Simulation code modeling the elaborated circuit design is generated that updates a formal and actual of a port that are compatible using a single write operation to the referenced memory location.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: December 29, 2015
    Assignee: XILINX, INC.
    Inventors: Ishita Ghosh, Saikat Bandyopadhyay, Kumar Deepak, Hem C. Neema, David K. Liddell