Abstract: INL values are determined for sub-segments of a DAC adapted to accept N bit digital input codes, and a first set of correction codes that can be used to reduce to a range of INL values (to improve linearity of the DAC) are determined and stored. Additionally, DNL values are determined for the sub-segments of the DAC, and a second set of correction codes that can be used to ensure that all values of DNL>?1 (to ensure that the DAC is monotonic) are determined and stored. This can include using one or more extra bits of resolution to remap at least some of the 2^N possible digital input codes (that can be accepted by the DAC) to more than 2^N possible digital output codes, to ensure that all values of DNL>?1. Such stored first and second sets are thereafter used when performing digital to analog conversions.

Abstract: INL values are determined for sub-segments of a DAC adapted to accept N bit digital input codes, and a first set of correction codes that can be used to reduce to a range of INL values (to improve linearity of the DAC) are determined and stored. Additionally, DNL values are determined for the sub-segments of the DAC, and a second set of correction codes that can be used to ensure that all values of DNL>?1 (to ensure that the DAC is monotonic) are determined and stored. This can include using one or more extra bits of resolution to remap at least some of the 2?N possible digital input codes (that can be accepted by the DAC) to more than 2?N possible digital output codes, to ensure that all values of DNL>?1. Such stored first and second sets are thereafter used when performing digital to analog conversions.

Abstract: INL values are determined for a plurality of sub-segments of a DAC that is adapted to accept N bit digital input codes, and a first set of correction codes that can be used to reduce to a range of INL values (to thereby improve linearity of the DAC) are determined and stored. Additionally, DNL values are determined for the plurality of sub-segments for which INL values were determined, and a second set of correction codes that can be used to ensure that all values of DNL>?1 (to thereby ensure that the DAC is monotonic) are determined and stored. This can include using one or more extra bits of resolution to remap at least some of the 2^N possible digital input codes (that can be accepted by the DAC) to more than 2^N possible digital output codes, to ensure that all values of DNL>?1. Such stored first and second sets are thereafter used when performing digital to analog conversions.

Abstract: INL values are determined for a plurality of sub-segments of a DAC that is adapted to accept N bit digital input codes, and a first set of correction codes that can be used to reduce to a range of INL values (to thereby improve linearity of the DAC) are determined and stored. Additionally, DNL values are determined for the plurality of sub-segments for which INL values were determined, and a second set of correction codes that can be used to ensure that all values of DNL >?1 (to thereby ensure that the DAC is monotonic) are determined and stored. This can include using one or more extra bits of resolution to remap at least some of the 2?N possible digital input codes (that can be accepted by the DAC) to more than 2?N possible digital output codes, to ensure that all values of DNL >?1. Such stored first and second sets are thereafter used when performing digital to analog conversions.

Abstract: A simple, cost-effective compression circuit which compress raw color data without interpolation. Control points common to all the colors in a line are generated each time one of the colors exceeds the color change threshold. The change in the other color is recorded at the same time even though it doesn't exceed the minimum change threshold.

Abstract: Post processing of the converted digital bits from an ADC to provide one or more additional bits of resolution. The additional bits of resolution will be accurate for data which is locally correlated, such as image data. For a particular digital sample, a curve (such as a straight line) is fitted through adjacent samples to determine an expected value for the current sample. The actual digital sample is compared to the expected value to determine whether it is within a threshold of the expected value. The value of an additional bit of resolution is set based upon whether the sample is within the threshold.