Patents by Inventor Islam A.K.M MAHFUZUL

Islam A.K.M MAHFUZUL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Reconfigurable delay circuit, delay monitor circuit using said delay circuit, variation compensation circuit, variation measurement method, and variation compensation method
    Patent number: 9899993
    Abstract: A delay circuit contains a first inversion circuit including a pull-up circuit and a pull-down circuit, and a second inversion circuit including a pull-up circuit and a pull-down circuit. The delay circuit further contains a first pass transistor connected in series to the pull-up circuit in the first inversion circuit between a power supply potential and an output node, a second pass transistor connected in series to the pull-down circuit in the first inversion circuit between a ground potential and the output node, a third pass transistor connected in series between the input node and the pull-up circuit in the second inversion circuit, and a fourth pass transistor connected in series between the input node and the pull-down circuit in the second inversion circuit. A delay characteristic of the delay circuit is changed by a combination of control signals applied to gates of the pass transistors.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: February 20, 2018
    Assignee: JAPAN SCIENCE AND TECHNOLOGY AGENCY
    Inventors: Hidetoshi Onodera, Islam A. K. M Mahfuzul
  • RECONFIGURABLE DELAY CIRCUIT, DELAY MONITOR CIRCUIT USING SAID DELAY CIRCUIT, VARIATION COMPENSATION CIRCUIT, VARIATION MEASUREMENT METHOD, AND VARIATION COMPENSATION METHOD
    Publication number: 20160211836
    Abstract: A delay circuit contains a first inversion circuit including a pull-up circuit and a pull-down circuit, and a second inversion circuit including a pull-up circuit and a pull-down circuit. The delay circuit further contains a first pass transistor connected in series to the pull-up circuit in the first inversion circuit between a power supply potential and an output node, a second pass transistor connected in series to the pull-down circuit in the first inversion circuit between a ground potential and the output node, a third pass transistor connected in series between the input node and the pull-up circuit in the second inversion circuit, and a fourth pass transistor connected in series between the input node and the pull-down circuit in the second inversion circuit. A delay characteristic of the delay circuit is changed by a combination of control signals applied to gates of the pass transistors.
    Type: Application
    Filed: July 29, 2014
    Publication date: July 21, 2016
    Inventors: Hidetoshi ONODERA, Islam A.K.M MAHFUZUL