Abstract: A THz radiation detector comprising a plurality of antenna arms separated from a suspended platform by an isolating thermal air gap. The detector functions to concentrate THz radiation energy into the smaller suspended MEMS platform (e.g., membrane) upon which a thermal sensor element is located. The THz photon energy is converted into electrical energy by means of a pixilated antenna using capacitive coupling in order to couple this focused energy across the thermally isolated air gap and onto the suspended membrane on which the thermal sensor is located.

Abstract: A THz radiation detector comprising a plurality of antenna arms separated from a suspended platform by an isolating thermal air gap. The detector functions to concentrate THz radiation energy into the smaller suspended MEMS platform (e.g., membrane) upon which a thermal sensor element is located. The THz photon energy is converted into electrical energy by means of a pixilated antenna using capacitive coupling in order to couple this focused energy across the thermally isolated air gap and onto the suspended membrane on which the thermal sensor is located.

Abstract: A novel method for optimizing the implementation of clock gating logic in digital circuits utilizing clock gating. The method over-approximates the clock gating function by removing the variable with the least influence on the resulting approximation function. Approximations of clock gating functions expressed in normal form are performed by removing an appropriate component from the function. Approximations of clock gating functions expressed in conjunctive normal form are performed by removing a clause from the function. Approximations of clock gating functions expressed in disjunctive normal form are performed by removing a literal from a clause in the function.

Abstract: A method for migrating an electronic circuit from a source technology to a target technology includes accepting a source circuit that operates in the source technology. The source circuit includes source components interconnected at nodes in accordance with a source topology. Source voltages at the nodes of the source circuit are determined, and the source voltages are transformed to produce respective target voltages suitable for the target technology. The source circuit is separated into sub-circuits, each sub-circuit including one or more of the source components. In each sub-circuit individually, the one or more of the source components are converted to one or more respective target components in the target technology responsively to the target voltages, so as to produce a respective migrated sub-circuit. The migrated sub-circuits are reconnected to produce a target circuit in the target technology, the target circuit having a target topology identical to the source topology.

Abstract: A novel method for optimizing the implementation of clock gating logic in digital circuits utilizing clock gating. The method over-approximates the clock gating function by removing the variable with the least influence on the resulting approximation function. Approximations of clock gating functions expressed in normal form are performed by removing an appropriate component from the function. Approximations of clock gating functions expressed in conjunctive normal form are performed by removing a clause from the function. Approximations of clock gating functions expressed in disjunctive normal form are performed by removing a literal from a clause in the function.

Abstract: A method for migrating an electronic circuit from a source technology to a target technology includes accepting a source circuit that operates in the source technology. The source circuit includes source components interconnected at nodes in accordance with a source topology. Source voltages at the nodes of the source circuit are determined, and the source voltages are transformed to produce respective target voltages suitable for the target technology. The source circuit is separated into sub-circuits, each sub-circuit including one or more of the source components. In each sub-circuit individually, the one or more of the source components are converted to one or more respective target components in the target technology responsively to the target voltages, so as to produce a respective migrated sub-circuit. The migrated sub-circuits are reconnected to produce a target circuit in the target technology, the target circuit having a target topology identical to the source topology.

Abstract: A method for migrating an electronic circuit from a source technology to a target technology includes accepting a source circuit that operates in the source technology. The source circuit includes source components interconnected at nodes in accordance with a source topology. Source voltages at the nodes of the source circuit are determined, and the source voltages are transformed to produce respective target voltages suitable for the target technology. The source circuit is separated into sub-circuits, each sub-circuit including one or more of the source components. In each sub-circuit individually, the one or more of the source components are converted to one or more respective target components in the target technology responsively to the target voltages, so as to produce a respective migrated sub-circuit. The migrated sub-circuits are reconnected to produce a target circuit in the target technology, the target circuit having a target topology identical to the source topology.

Abstract: A method for migrating an electronic circuit from a source technology to a target technology includes accepting a source circuit that operates in the source technology. The source circuit includes source components interconnected at nodes in accordance with a source topology. Source voltages at the nodes of the source circuit are determined, and the source voltages are transformed to produce respective target voltages suitable for the target technology. The source circuit is separated into sub-circuits, each sub-circuit including one or more of the source components. In each sub-circuit individually, the one or more of the source components are converted to one or more respective target components in the target technology responsively to the target voltages, so as to produce a respective migrated sub-circuit. The migrated sub-circuits are reconnected to produce a target circuit in the target technology, the target circuit having a target topology identical to the source topology.

Abstract: A method for storing images that are input to a storage system by one or more operators. Some of the images are classified into a plurality of predefined groups, such that the images in each predefined group of the plurality are characterized by respective common information shared by all the images in the predefined group. Other images, which were not classifiable into any of the predefined groups, are processed so as to define a new group containing a subset of the second portion of the images, such that the images in the new group are characterized by new common information shared by all the images in the new group. The images in each group among the predefined and new groups are compressed by extracting from each of the images the common information that characterizes the group.

Abstract: A method for automatic sorting includes receiving an item in a sequence of items to be sorted, each such item marked with a respective machine-readable identifying code and with respective characters in a location relative to the code that varies from one item to another in the sequence. A position of the code on the item is determined and, responsive to the position of the code, the location of the characters on the item is found. The characters are processed to determine a destination of the item.