Abstract: A method of forming a resist pattern includes applying a photoresist to first and second regions of a processing target to form a resist layer. The processing target includes a stacked body of alternately stacked first and second layers. The first region includes an upper surface of the stacked body, and the second region includes a recess extending into the stacked body from the upper surface. The resist layer is then patterned with light passed through a multi-gradation mask including a partial translucent feature at an outer perimeter of the recess, a light shielding feature corresponding in position to the recess, and a translucent feature surrounding the partial translucent feature. A resist pattern is formed including an overhang portion extending above a portion of the recess.

Abstract: A storage device according to embodiments includes a substrate, a stacked body, a first region, a second region, and first to nth electrodes. The stacked body is provided on the substrate and having first to nth (n is an integer of 3 or more) conductive layers stacked in a direction perpendicular to a surface of the substrate. The first region includes a part of the stacked body, and has a first step structure including the first to the nth conductive layers. The second region includes a part of the stacked body, and has a second step structure different from the first step structure including at least a part of the first to nth conductive layers. The first to nth electrodes are provided in the first region and connected to the first to nth conductive layers and extend in a direction perpendicular to the surface of the substrate.

Abstract: A storage device according to embodiments includes a substrate, a stacked body, a first region, a second region, and first to nth electrodes. The stacked body is provided on the substrate and having first to nth (n is an integer of 3 or more) conductive layers stacked in a direction perpendicular to a surface of the substrate. The first region includes a part of the stacked body, and has a first step structure including the first to the nth conductive layers. The second region includes a part of the stacked body, and has a second step structure different from the first step structure including at least a part of the first to nth conductive layers. The first to nth electrodes are provided in the first region and connected to the first to nth conductive layers and extend in a direction perpendicular to the surface of the substrate.

Abstract: According to the embodiments, a first representative point is set on outline pattern data on a pattern formed in a process before a processed pattern. Then, a minimum distance from the first representative point to a peripheral pattern is calculated. Then, area of a region with no pattern, which is sandwiched by the first representative point and the peripheral pattern, in a region within a predetermined range from the first representative point is calculated. Then, it is determined whether the first representative point becomes a processing failure by using the minimum distance and the area.

Abstract: A mask verification method includes setting optical parameters, verifying whether a pattern, which is obtained when a mask pattern other than a reference pattern of patterns on a mask is transferred on a substrate with use of the set optical parameters, satisfies dimensional specifications, and varying, when the pattern which is obtained when the mask pattern is transferred on the substrate is determined to fail to satisfy the dimensional specifications, the optical parameters at the time of transfer such that the pattern, which is obtained when the reference pattern is transferred on the substrate, satisfies a target dimensional condition, and verifying whether a pattern, which is obtained when the mask pattern other than the reference pattern of the patterns on the mask is transferred on the substrate with use of the varied optical parameters, satisfies the dimensional specifications.