Patents by Inventor Issy Kipnis
Issy Kipnis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240021522Abstract: Various devices, systems, and/or methods perform wireless chip to chip high speed data transmission. Strategies for such transmission include use of improved microbump antennas, wireless chip to chip interconnects, precoding and decoding strategies, channel design to achieve spatial multiplexing gain in line of sight transmissions, open cavity chip design for improved transmission, and/or mixed signal channel equalization.Type: ApplicationFiled: December 23, 2020Publication date: January 18, 2024Inventors: Tolga ACIKALIN, Tae Young YANG, Debabani CHOUDHURY, Shuhei YAMADA, Roya DOOSTNEJAD, Hosein NIKOPOUR, Issy KIPNIS, Oner ORHAN, Mehnaz RAHMAN, Kenneth P. FOUST, Christopher D. HULL, Telesphor KAMGAING, Omkar KARHADE, Stefano PELLERANO, Peter SAGAZIO, Sai VADLAMANI
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Patent number: 9692260Abstract: In accordance with various aspects of the disclosure, devices and methods are disclosed that include measuring, at a transmitter, a reflected power level corresponding to a specific transmit power level, and setting the transmit power to an operational level. At the transmitter, a new operational level of the transmit power may be determined, for example, by selecting at least one trial transmit power level, and based on reflected power levels measured corresponding to the operational level and the at least one trial level of the transmit power, either maintaining the operational level as the new operational level, or determining the at least one trial level as the new operational level. The operational transmit power level may correspond to a lowest reflected power level, or a highest rate of change of the reflected power level with respect to the transmit power level.Type: GrantFiled: November 3, 2011Date of Patent: June 27, 2017Assignee: INTEL CORPORATIONInventors: Jim Walsh, Joshua R. Smith, Issy Kipnis, Gamil A. Cain
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Publication number: 20150188693Abstract: Described are phase adjustment circuits for clock and data recovery circuits (CDRs). Systems and apparatuses may include an input to receive a serial data signal, an edge data tap to sample transition edges in the serial data signal for generating a data edge detection signal, a CDR circuit including a phase detector to receive the serial data signal and the data edge detection signal, and to output a phase lead/lag signal indicating the phase difference between the serial data signal and the data edge detection signal, and a phase adjustment circuit to generate phase lead/lag adjustment data. The CDR circuit is to output a recovered clock signal based, at least in part, on the phase lead/lag signal adjusted by the phase lead/lag adjustment data.Type: ApplicationFiled: December 27, 2013Publication date: July 2, 2015Inventors: Stefano GIACONI, Mingming XU, Issy KIPNIS
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Publication number: 20140252866Abstract: In accordance with various aspects of the disclosure, a wireless power transmitting apparatus, system, and method are presented that include features of detecting a forward power level and a reflected power level of an electromagnetic field in which a wireless transmit device is capable of determining the presence of a wireless receive device based on the detected reflected power levels.Type: ApplicationFiled: March 11, 2011Publication date: September 11, 2014Inventors: Jim Walsh, Joshua R. Smith, Issy Kipnis
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Publication number: 20140103734Abstract: In accordance with various aspects of the disclosure, devices and methods are disclosed that include measuring, at a transmitter, a reflected power level corresponding to a specific transmit power level, and setting the transmit power to an operational level. At the transmitter, a new operational level of the transmit power may be determined, for example, by selecting at least one trial transmit power level, and based on reflected power levels measured corresponding to the operational level and the at least one trial level of the transmit power, either maintaining the operational level as the new operational level, or determining the at least one trial level as the new operational level. The operational transmit power level may correspond to a lowest reflected power level, or a highest rate of change of the reflected power level with respect to the transmit power level.Type: ApplicationFiled: November 3, 2011Publication date: April 17, 2014Inventors: Jim Walsh, Joshua R. Smith, Issy Kipnis, Gamil A. Cain
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Patent number: 8433253Abstract: Briefly, in accordance with one or more embodiments, a mixer circuit at a receiver of an RFID interrogator may operate at a power supply voltage selected based at least in part on a power level of the self-jammer signal. The mixer circuit may operate at a higher power supply voltage if the expected power level of the self-jammer signal is higher, and may operate at a lower power supply voltage if the expected power level of the self-jammer signal is lower.Type: GrantFiled: June 14, 2007Date of Patent: April 30, 2013Assignee: Intel CorporationInventors: Rish Mehta, Issy Kipnis
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Publication number: 20120249301Abstract: Briefly, in accordance with one or more embodiments, a mixer circuit at a receiver of an RFID interrogator may operate at a power supply voltage selected based at least in part on a power level of the self-jammer signal. The mixer circuit may operate at a higher power supply voltage if the expected power level of the self-jammer signal is higher, and may operate at a lower power supply voltage if the expected power level of the self-jammer signal is lower.Type: ApplicationFiled: June 14, 2007Publication date: October 4, 2012Inventors: Rish Mehta, Issy Kipnis
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Patent number: 8013715Abstract: A device and method for canceling one or more self-jammer signals in a radio-frequency identification system.Type: GrantFiled: June 29, 2007Date of Patent: September 6, 2011Assignee: Intel CorporationInventors: Scott Chiu, Mohammed Sajid, Issy Kipnis
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Patent number: 7742751Abstract: Provided are a method, system, and device directed to a receive path for a node in a communication system such as a Radio Frequency Identification (RFID) system. In one aspect, the receive path includes a filter operable in multiple modes and configurable to have different bandwidths in the various modes of operation. For example, in one mode, the filter samples a DC component while configured to have a relatively wide bandwidth. As another example, the filter may be operated in another mode to hold the sampled DC component while the filter is configured to have a zero or close to zero bandwidth. As yet another example, the filter may be operated in still another mode to filter received signals and cancel the sampled DC offset from the received signals while configured to have a relatively narrow bandwidth. Additional embodiments are described and claimed.Type: GrantFiled: December 20, 2006Date of Patent: June 22, 2010Assignee: Intel CorporationInventors: Scott Chiu, Issy Kipnis, Jan Rapp, David Westberg
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Patent number: 7612684Abstract: Briefly, in accordance with one or more embodiments, a dual mode power amplifier is capable of operating in either linear mode such as class A operation, or a non-linear mode such as class F operation. The power amplifier may be utilized in an RFID interrogator. The power amplifier may be biased to operate in a linear mode if the power amplifier is operating in a higher linearity mode, or may be biased to operate in a non-linear mode if the power amplifier is operating in a higher efficiency, lower power mode. The power amplifier may comprise two or more amplifiers coupled in parallel. A current mirror circuit may turn on more amplifiers if the power amplifier is operating in a higher power mode, and may turn on fewer amplifiers if the power amplifier is operating a lower power mode.Type: GrantFiled: June 22, 2007Date of Patent: November 3, 2009Assignee: Intel CorporationInventors: Issy Kipnis, Daniel Bjork, Jan Rapp
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Publication number: 20090002131Abstract: A device and method for canceling one or more self-jammer signals in a radio-frequency identification system.Type: ApplicationFiled: June 29, 2007Publication date: January 1, 2009Inventors: Scott Chiu, Mohammed Sajid, Issy Kipnis
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Publication number: 20080315993Abstract: Briefly, in accordance with one or more embodiments, a dual mode power amplifier is capable of operating in either linear mode such as class A operation, or a non-linear mode such as class F operation. The power amplifier may be utilized in an RFID interrogator. The power amplifier may be biased to operate in a linear mode if the power amplifier is operating in a higher linearity mode, or may be biased to operate in a non-linear mode if the power amplifier is operating in a higher efficiency, lower power mode. The power amplifier may comprise two or more amplifiers coupled in parallel. A current mirror circuit may turn on more amplifiers if the power amplifier is operating in a higher power mode, and may turn on fewer amplifiers if the power amplifier is operating a lower power mode.Type: ApplicationFiled: June 22, 2007Publication date: December 25, 2008Inventors: Issy Kipnis, Daniel Bjork, Jan Rapp
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Publication number: 20080150689Abstract: Provided are a method, system, and device directed to a receive path for a node in a communication system such as a Radio Frequency Identification (RFID) system. In one aspect, the receive path includes a filter operable in multiple modes and configurable to have different bandwidths in the various modes of operation. For example, in one mode, the filter samples a DC component while configured to have a relatively wide bandwidth. As another example, the filter may be operated in another mode to hold the sampled DC component while the filter is configured to have a zero or close to zero bandwidth. As yet another example, the filter may be operated in still another mode to filter received signals and cancel the sampled DC offset from the received signals while configured to have a relatively narrow bandwidth. Additional embodiments are described and claimed.Type: ApplicationFiled: December 20, 2006Publication date: June 26, 2008Inventors: Scott CHIU, Issy KIPNIS, Jan RAPP, David WESTBERG
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Patent number: 7312505Abstract: A semiconductor substrate integrated with interconnections and circuit components. A silicon backplane is processed with silicon processing to provide electrical connectivity for circuit elements. In one embodiment functional circuit elements, e.g., MEMS, switches, filters, are integrated on the silicon backplane. In one embodiment the function circuit elements are monolithically processed into the silicon backplane. In one embodiment the silicon backplane includes interconnections for integrated circuits on different substrates to be bonded to the silicon backplane.Type: GrantFiled: March 31, 2004Date of Patent: December 25, 2007Assignee: Intel CorporationInventors: Issy Kipnis, Valluri R. Rao
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Patent number: 7307331Abstract: A highly integrated radio front-end module. In one embodiment a semiconductor substrate is processed with various circuit components in the substrate, as well as interconnections for the various circuit components, embedding the circuit components into the substrate. One or more circuit components may be further connected with a separate integrated circuit, the separate integrated circuit bonded to the semiconductor substrate via contact points processed into the substrate.Type: GrantFiled: September 16, 2004Date of Patent: December 11, 2007Assignee: Intel CorporationInventors: Issy Kipnis, Valluri R. Rao
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Patent number: 7167135Abstract: An antenna for a wireless device may be kept dynamically tuned to a desired center frequency to compensate for detuning which may be caused by environmental influences. A sensor provides a feedback signal to a controller to select an appropriate capacitance value from a variable capacitor to tune the antenna for the wireless device. The variable capacitor may comprise a plurality of fixed capacitors and MEMS switches arranged in parallel or may comprise a variable MEMS capacitor having a fixed lower plate and a flexible upper plate.Type: GrantFiled: June 25, 2004Date of Patent: January 23, 2007Assignee: Intel CorporationInventors: Issy Kipnis, Valluri Rao, Balakrishnan Srinivasan, Joe Hayden, III
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Publication number: 20070004355Abstract: Apparatus, system, and method for multi-class wireless receiver are described. The multi-class receiver includes a first down-converter coupled to an input port, a filter coupled to the first-down converter, and a second down-converter coupled to the filter. In a first mode, the filter is configured as a first filter and the second down-converter is disabled. In a second mode, the filter is configured as a second filter and the second down converter is enabled. The system includes a wireless module and a wireless transceiver in communication with the wireless module. The method includes receiving multi-class RF signals, converting at least a first class of RF signals in a first mode of operation, and converting at least a second class of RF signals in a second mode of operation with said multi-class receiver.Type: ApplicationFiled: June 29, 2005Publication date: January 4, 2007Inventors: Issy Kipnis, Scott Chiu, David Westberg, Jan Rapp, Jonas Johansson
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Publication number: 20060025102Abstract: A highly integrated radio front-end module. In one embodiment a semiconductor substrate is processed with various circuit components in the substrate, as well as interconnections for the various circuit components, embedding the circuit components into the substrate. One or more circuit components may be further connected with a separate integrated circuit, the separate integrated circuit bonded to the semiconductor substrate via contact points processed into the substrate.Type: ApplicationFiled: September 16, 2004Publication date: February 2, 2006Inventors: Issy Kipnis, Valluri Rao
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Publication number: 20050218509Abstract: A semiconductor substrate integrated with interconnections and circuit components. A silicon backplane is processed with silicon processing to provide electrical connectivity for circuit elements. In one embodiment functional circuit elements, e.g., MEMS, switches, filters, are integrated on the silicon backplane. In one embodiment the function circuit elements are monolithically processed into the silicon backplane. In one embodiment the silicon backplane includes interconnections for integrated circuits on different substrates to be bonded to the silicon backplane.Type: ApplicationFiled: March 31, 2004Publication date: October 6, 2005Inventors: Issy Kipnis, Valluri Rao
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Patent number: 6940938Abstract: A technique includes detecting a phase difference between an input signal and a first signal. A second signal is generated that has a fundamental frequency indicative of the phase difference. The second signal is modulated to produce the first signal.Type: GrantFiled: July 31, 2002Date of Patent: September 6, 2005Assignee: Intel CorporationInventors: Michael W. Altman, Issy Kipnis