Patents by Inventor Istvan Rodriguez

Istvan Rodriguez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10277176
    Abstract: A circuit having an amplifier, comprising: a depletion mode transistor having a source electrode coupled to a reference potential; a drain electrode coupled to a potential more positive than the reference potential; and a gate electrode for coupling to an input signal. The circuit includes a bias circuit, comprising: a current source; and biasing circuitry coupled to the current source and between the potential more positive than the reference potential and a potential more negative than the reference potential. A control circuit is connected to the current source for controlling the amount of current produced by the current source to the biasing circuitry.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: April 30, 2019
    Assignee: Raytheon Company
    Inventors: John P. Bettencourt, Alan J. Bielunis, Istvan Rodriguez, Zhaoyang C. Wang
  • Patent number: 10199470
    Abstract: A Field Effect Transistor (FET) having a substrate; a plurality of active regions disposed on the substrate; and a laterally extending finger-like control electrode disposed on a portion of a surface of the substrate. The active regions are laterally spaced one from the other successively along the laterally extending finger-like control electrode. The laterally extending finger-like control electrode controls a flow of carriers through each one of the plurality of active regions between a source electrode and a drain electrode.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: February 5, 2019
    Assignee: Raytheon Company
    Inventors: Alan J. Bielunis, Istvan Rodriguez, Christopher M. Laighton
  • Publication number: 20180167041
    Abstract: A circuit having an amplifier, comprising: a depletion mode transistor having a source electrode coupled to a reference potential; a drain electrode coupled to a potential more positive than the reference potential; and a gate electrode for coupling to an input signal. The circuit includes a bias circuit, comprising: a current source; and biasing circuitry coupled to the current source and between the potential more positive than the reference potential and a potential more negative than the reference potential. A control circuit is connected to the current source for controlling the amount of current produced by the current source to the biasing circuitry.
    Type: Application
    Filed: February 9, 2018
    Publication date: June 14, 2018
    Applicant: Raytheon Company
    Inventors: John P. Bettencourt, Alan J. Bielunis, Istvan Rodriguez, Zhaoyang C. Wang
  • Publication number: 20180130888
    Abstract: A Field Effect Transistor (FET) having a substrate; a plurality of active regions disposed on the substrate; and a laterally extending finger-like control electrode disposed on a portion of a surface of the substrate. The active regions are laterally spaced one from the other successively along the laterally extending finger-like control electrode. The laterally extending finger-like control electrode controls a flow of comers through each one of the plurality of active regions between a source electrode and a drain electrode.
    Type: Application
    Filed: November 8, 2016
    Publication date: May 10, 2018
    Applicant: Raytheon Company
    Inventors: Alan J. Bielunis, Istvan Rodriguez, Christopher M. Laighton
  • Patent number: 9960740
    Abstract: A circuit having an amplifier, comprising: a depletion mode transistor having a source electrode coupled to a reference potential; a drain electrode coupled to a potential more positive than the reference potential; and a gate electrode for coupling to an input signal. The circuit includes a bias circuit, comprising: a current source; and biasing circuitry coupled to the current source and between the potential more positive than the reference potential and a potential more negative than the reference potential. A control circuit is connected to the current source for controlling the amount of current produced by the current source to the biasing circuitry.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: May 1, 2018
    Assignee: Raytheon Company
    Inventors: John P. Bettencourt, Alan J. Bielunis, Istvan Rodriguez, Zhaoyang C. Wang
  • Publication number: 20170271281
    Abstract: A microwave amplifier having a field effect transistor formed on an upper surface of a substrate. A de-Q'ing section connected to the field effect transistor includes: a de-Q'ing resistive via that passes through the substrate; and a de-Q'ing capacitor having one plate thereof connected a ground plane conductor through the de-Q'ing resistive via.
    Type: Application
    Filed: July 5, 2016
    Publication date: September 21, 2017
    Applicant: Raytheon Company
    Inventors: Istvan Rodriguez, Christopher M. Laighton, Alan J. Bielunis
  • Patent number: 9755333
    Abstract: A high power RF connector receptacle having a solderable pin, an outer connector receptacle shell and a high breakdown voltage dielectric such as Silicon Carbide. The connector receptacle can be completed as a stepped process where the Silicon Carbide substrate can be mounted to the package, the pin can be dropped into place and soldered, and then the outer shell can be soldered onto the SiC substrate. Alternatively, the SiC, pin and outer shell can be assembled as a subassembly and then soldered to the package. The combination of SiC and solder gives a hermetic seal to the package. In addition, the SiC has an extraordinarily high dielectric breakdown voltage for high power connections.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: September 5, 2017
    Assignee: Raytheon Company
    Inventors: Christopher M. Laighton, Istvan Rodriguez, Alan J. Bielunis
  • Patent number: 9698144
    Abstract: A Field Effect Transistor (FET) having a plurality of FET cells having a plurality of source pads, a plurality of drain pads, and a plurality of gate electrodes disposed on a surface of a substrate; each one of the FET cells having a corresponding one of the gate electrodes disposed between one of the source pads and one of the drain pads. The FET includes; a gate contact connected to the gate electrode of each one of the FET cells; a drain contact connected to the drain pad of each one of the FET cells; and a source contact connected to source pad of each one of the FET cells. The cells are disposed in a loop configuration.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: July 4, 2017
    Assignee: Raytheon Company
    Inventors: Istvan Rodriguez, Christopher M. Laighton, Alan J. Bielunis
  • Patent number: 9685438
    Abstract: A Field Effect Transistor (FET) having: a plurality of FET cells having a plurality of source pads, a plurality of drain pads, and a plurality of gate electrodes disposed on a surface of a substrate; each one of the FET cells having a corresponding one of the gate electrodes disposed between one of the source pads and one of the drain pads; a gate contact connected to the gate electrodes of each one of the FET cells; a drain contact connected to the drain pad of each one of the FET cells; and a source contact connected to source pad of each one of the FET cells. The cells are disposed on a surface in a two-dimensional array.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: June 20, 2017
    Assignee: RAYTHEON COMPANY
    Inventors: Christopher M. Laighton, Alan J. Bielunis, Istvan Rodriguez
  • Publication number: 20170162958
    Abstract: A high power RF connector receptacle having a solder able pin, an outer connector receptacle shell and a high breakdown voltage dielectric such as Silicon Carbide. The connector receptacle can be completed as a stepped process where the Silicon Carbide substrate can be mounted to the package, the pin can be dropped into place and soldered, and then the outer shell can be soldered onto the SiC substrate. Alternatively, the SiC, pin and outer shell can be assembled as a subassembly and then soldered to the package. The combination of SiC and solder gives a hermetic seal to the package.
    Type: Application
    Filed: July 5, 2016
    Publication date: June 8, 2017
    Applicant: Raytheon Company
    Inventors: Christopher M. Laighton, Istvan Rodriguez, Alan J. Bielunis
  • Patent number: 9589917
    Abstract: A Microwave Monolithic Integrated Circuit (MMIC) having an integrated high power load. The MMIC includes a microwave transmission line and a resistive load coupled to a terminating end of the microwave transmission line. The resistive load comprises a hollow resistive material disposed on sidewalls of a via passing through a substrate, the resistive material having an upper portion electrically connected to a terminating end of a strip conductor of the microwave transmission line strip conductor and a lower portion electrically connected to the ground plane.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: March 7, 2017
    Assignee: Raytheon Company
    Inventors: Istvan Rodriguez, Christopher M. Laighton, Alan J. Bielunis
  • Publication number: 20170053910
    Abstract: A Field Effect Transistor (FET) having a plurality of FET cells having a plurality of source pads, a plurality of drain pads, and a plurality of gate electrodes disposed on a surface of a substrate; each one of the FET cells having a corresponding one of the gate electrodes disposed between one of the source pads and one of the drain pads. The FET includes; a gate contact connected to the gate electrode of each one of the FET cells; a drain contact connected to the drain pad of each one of the FET cells; and a source contact connected to source pad of each one of the FET cells. The cells are disposed in a loop configuration.
    Type: Application
    Filed: August 19, 2015
    Publication date: February 23, 2017
    Applicant: Raytheon Company
    Inventors: Istvan Rodriguez, Christopher M. Laighton, Alan J. Bielunis
  • Publication number: 20170053909
    Abstract: A Field Effect Transistor (FET) having: a plurality of FET cells having a plurality of source pads, a plurality of drain pads, and a plurality of gate electrodes disposed on a surface of a substrate; each one of the FET cells having a corresponding one of the gate electrodes disposed between one of the source pads and one of the drain pads; a gate contact connected to the gate electrodes of each one of the FET cells; a drain contact connected to the drain pad of each one of the FET cells; and a source contact connected to source pad of each one of the FET cells. The cells are disposed on a surface in a two-dimensional array.
    Type: Application
    Filed: August 19, 2015
    Publication date: February 23, 2017
    Applicant: RAYTHEON COMPANY
    Inventors: Christopher M. Laighton, Alan J. Bielunis, Istvan Rodriguez
  • Publication number: 20160373074
    Abstract: A circuit having an amplifier, comprising: a depletion mode transistor having a source electrode coupled to a reference potential; a drain electrode coupled to a potential more positive than the reference potential; and a gate electrode for coupling to an input signal. The circuit includes a bias circuit, comprising: a current source; and biasing circuitry coupled to the current source and between the potential more positive than the reference potential and a potential more negative than the reference potential. A control circuit is connected to the current source for controlling the amount of current produced by the current source to the biasing circuitry.
    Type: Application
    Filed: June 7, 2016
    Publication date: December 22, 2016
    Applicant: Raytheon Company
    Inventors: John P. Bettencourt, Alan J. Bielunis, Istvan Rodriguez, Zhaoyang C. Wang
  • Publication number: 20100117753
    Abstract: A radio frequency modulator system having a radio frequency amplifier controlled by a pulse modulator. The pulse modulator includes: a first switching circuit response to an input pulse for coupling a dc voltage relative to a reference potential to the output electrode when the radio frequency signal is to be amplified by the radio frequency amplifier and for decoupling the dc voltage from the output electrode when the radio frequency signal is to be decoupled from the output electrode wherein charge is stored in the storage element when the dc voltage is coupled to the output electrode; and: a second switching circuit responsive to the input pulse for discharging the stored charge when the dc voltage is decoupled from the output electrode.
    Type: Application
    Filed: November 10, 2008
    Publication date: May 13, 2010
    Inventors: Istvan Rodriguez, Robert A. Lindquist, JR.
  • Patent number: 7701308
    Abstract: A radio frequency modulator system having a radio frequency amplifier controlled by a pulse modulator. The pulse modulator includes: a first switching circuit response to an input pulse for coupling a dc voltage relative to a reference potential to the output electrode when the radio frequency signal is to be amplified by the radio frequency amplifier and for decoupling the dc voltage from the output electrode when the radio frequency signal is to be decoupled from the output electrode wherein charge is stored in the storage element when the dc voltage is coupled to the output electrode; and: a second switching circuit responsive to the input pulse for discharging the stored charge when the dc voltage is decoupled from the output electrode.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: April 20, 2010
    Assignee: Raytheon Company
    Inventors: Istvan Rodriguez, Robert A. Lindquist, Jr.