Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A semiconductor device includes a first MOS transistor, second MOS transistors, first contact plugs, and a second contact plug. The first MOS transistor with a first conductivity is formed on a semiconductor substrate. The second MOS transistors with a second conductivity are formed on the semiconductor substrate. The first contact plugs has a circular planar shape. The second contact plug has an elliptical planar shape and is formed on a source or a drain in one of the second MOS transistors. The first contact plugs are formed on sources or drains in the remaining second MOS transistors and the first MOS transistor.

Abstract: A semiconductor device includes a first MOS transistor, second MOS transistors, first contact plugs, and a second contact plug. The first MOS transistor with a first conductivity is formed on a semiconductor substrate. The second MOS transistors with a second conductivity are formed on the semiconductor substrate. The first contact plugs has a circular planar shape. The second contact plug has an elliptical planar shape and is formed on a source or a drain in one of the second MOS transistors. The first contact plugs are formed on sources or drains in the remaining second MOS transistors and the first MOS transistor.

Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A semiconductor device includes a resistance element. The resistance element includes a first and second conductive films, second insulating film, and contact plugs. The first conductive film is formed on a semiconductor substrate with a first insulating film interposed therebetween. The second insulating film is formed on the first conductive film. The second conductive film is formed on the second insulating film. In the first connection portion, the second insulating film is removed. The first connection portion connects the first conductive film and the second conductive film together. The contact plugs are formed on the second conductive film. The contact plugs are arranged such that a region located on the second conductive film and immediately above the connection portion is sandwiched between the contact plugs.

Abstract: A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A semiconductor device includes a first trench capacitor formed in a first trench, a second trench capacitor formed in a second trench, a first gate electrode disposed above a first active area, a second gate electrode disposed above a second active area, a first impurity doped region formed in an outer periphery of the second trench including a boundary adjacent to the second trench and doped with an impurity of a first conduction type, and a second impurity doped region formed in the first impurity doped region so as to include the first active area located below the first gate electrode, the second impurity doped region being doped with an impurity of a second conduction type opposite to the first conduction type impurity.

Abstract: A nonvolatile semiconductor memory according to an example of the present application includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Abstract: A semiconductor device includes a semiconductor substrate formed with a plurality of trenches, a plurality of trench capacitor type DRAM unit cells including capacitors formed in the trenches and cell transistors formed to be adjacent to the trenches respectively, a plurality of impurity doped regions including boundaries connecting the trenches and the cell transistors and formed in outer peripheries of the trenches, respectively, and a plurality of reverse conduction type impurity regions formed by doping regions of the substrate under the cell transistors with impurity of a reverse conduction type relative to the impurity doped regions, respectively.

Abstract: A method of fabricating a semiconductor device includes forming trenches in active areas respectively, the trenches having sidewalls and upper openings respectively, forming first conductive regions in the trenches so that the first conductive regions serve as electrodes of the trench capacitors, respectively, each first conductive region including first impurity of a predetermined conductive type, forming sidewall insulating films on the sidewalls located over the first conductive regions respectively, forming second conductive regions inside the sidewall insulating films respectively, removing the sidewall insulating film located above the second conductive regions respectively, doping regions of the substrate located under the gate electrodes with second impurity of a reverse conduction type relative to the first impurity in the second direction from the upper openings through portions of the trenches from which the sidewall insulating films have been removed respectively, and forming third conductive regi

Abstract: A semiconductor device includes a first insulating film having a plurality of wiring trenches formed at predetermined intervals in an upper part, the first insulating film having an upper surface, a second insulating film formed on the upper surface of the first insulating film so as to be located between the wiring trenches, the second insulating film having an upper surface, a wiring layer buried in the wiring trenches and formed so that an upper surface thereof is located lower than an upper surface of the second insulating film, and a via plug formed so as to be connected to the upper surface of the wiring layer.

Abstract: A semiconductor device includes a semiconductor substrate formed with a plurality of trenches, a plurality of trench capacitor type DRAM unit cells including capacitors formed in the trenches and cell transistors formed to be adjacent to the trenches respectively, a plurality of impurity doped regions including boundaries connecting the trenches and the cell transistors and formed in outer peripheries of the trenches, respectively, and a plurality of reverse conduction type impurity regions formed by doping regions of the substrate under the cell transistors with impurity of a reverse conduction type relative to the impurity doped regions, respectively.

Abstract: To solve problems that the amount of reuse toner increases with time recovery of reuse toner is efficiently achieved while forming an image of high quality. In a toner replenishing apparatus, toner recovered by a cleaning unit is conveyed via conveying device and contained in a recovery toner container. When an amount of the recovery toner exceeds a predetermined capacity of the recovery toner container, the recovery toner flows into a fresh toner container over an upper edge of a partition wall. Fresh toner and recovery toner are replenished to a developing unit via a fresh toner replenishing roller and a recovery toner replenishing roller, respectively, and the ratio between fresh toner and recovery toner is selected so that the fresh toner occupies a larger part than the recovery toner. This ratio is controlled on the basis of the cumulative rotation time of a photoconductor drum counted by a counting device.