Patents by Inventor Itaru Maekawa

Itaru Maekawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060221926
    Abstract: A game apparatus according to a preferred embodiment includes a first wireless communication module and a second wireless communication module. The first wireless communication module performs communication utilizing Bluetooth protocols, whereas the second wireless communication module performs communication utilizing IEEE802.11 protocols. The first radio communication module and the second radio module have a common reference communication cycle, and each communicates in communication cycles of an integral multiple of a reference communication cycle. A control unit sets offset time between from the start time of a communication by the first wireless communication module until the start time of a communication by the second wireless communication module. In so doing, the control unit monitors the communication load of the first wireless communication module and sets the offset time based on a monitored result.
    Type: Application
    Filed: March 10, 2006
    Publication date: October 5, 2006
    Inventors: Itaru Maekawa, Jun Nishihara
  • Publication number: 20060034315
    Abstract: A communication terminal is provided with a transmission control unit for controlling a transmission mode in which a broadcast signal is transmitted a plurality of times, and a reception control unit for controlling a reception mode in which the broadcast signal transmitted from another communication terminal is monitored. The transmission control unit and the reception control unit execute the transmission mode and the reception mode cyclically and alternately. To achieve power saving, time reserved for execution of the transmission mode in a cycle is set to be longer than time reserved for execution of the reception mode in the cycle.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 16, 2006
    Inventors: Itaru Maekawa, Kazushige Taniguchi
  • Publication number: 20050233704
    Abstract: Each station makes a transition to a power saving state autonomously in response to the reception of signals from the other stations in the same group and the transmission of its own signal. Each station sets its transmission timing such that it does not overlap the transmission timing of the other stations, by referring to data elements included in a beacon signal. The transmission timing in the stations is determined for each transmission.
    Type: Application
    Filed: April 14, 2005
    Publication date: October 20, 2005
    Inventor: Itaru Maekawa
  • Publication number: 20050233789
    Abstract: Each station makes a transition to a power saving state autonomously in response to the reception of signals from the other stations in the same group and the transmission of its own signal. Each station sets its transmission timing such that it does not overlap the transmission timing of the other stations, by referring to data elements included in a beacon signal. The transmission timing in the stations is determined for each transmission.
    Type: Application
    Filed: April 14, 2005
    Publication date: October 20, 2005
    Inventor: Itaru Maekawa
  • Publication number: 20050143145
    Abstract: A communication terminal and a method of the present invention aim to save electric power in a wireless ad hoc network. According to the communication method, the signal transmission processing of stations is stopped in response to a beacon signal for sleep, which is sent from one of the stations. The signal transmission processing of the stations is carried out in response to a beacon signal for awakening. Since an operation mode of the stations is controlled by the beacon signal, it is possible to certainly transmit a signal, and secure a sleep state for saving electric power.
    Type: Application
    Filed: November 17, 2004
    Publication date: June 30, 2005
    Inventor: Itaru Maekawa
  • Patent number: 5633610
    Abstract: A monolithic microwave semiconductor integrated circuit including a bias stabilizing circuit of a current mirror type formed of a bias control transistor formed of an enhancement mode compound semiconductor field effect transistor and a biased transistor formed of an enhancement mode compound semiconductor field effect transistor.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: May 27, 1997
    Assignee: Sony Corporation
    Inventors: Itaru Maekawa, Takahiro Ohgihara, Kuninobu Tanaka
  • Patent number: 5486787
    Abstract: A monolithic microwave semiconductor integrated circuit including a bias stabilizing circuit of a current mirror type formed of a bias control transistor formed of an enhancement mode compound semiconductor field effect transistor and a biased transistor formed of an enhancement mode compound semiconductor field effect transistor.
    Type: Grant
    Filed: January 7, 1994
    Date of Patent: January 23, 1996
    Assignee: Sony Corporation
    Inventors: Itaru Maekawa, Takahiro Ohgihara, Kuninobu Tanaka
  • Patent number: 5164614
    Abstract: A bias voltahe generating circuit which is low in power consumption and small in chip size of an IC and does not pickup noises readily. The bias voltage generating circuit comprises a current mirror circuit including a diode-connected first transistor of a first conduction type and second and third transistors of the first conduction type, and bias voltage generating fourth and fifth transistors of a different second conduction type having input electrodes connected to output electrodes of the second and third transistors, respectively. The first to third transistors and the fourth and fifth transistors are formed on a single chip semiconductor substrate as a semiconductor integrated circuit. The bias voltage generating circuit further comprises a resistor provided outside the integrated circuit and connected to an input electrode of the first transistor, and a predetermined bias current is supplied to the first transistor through the resistor.
    Type: Grant
    Filed: July 10, 1991
    Date of Patent: November 17, 1992
    Assignee: Sony Corporation
    Inventor: Itaru Maekawa