Abstract: A method for semiconductor metrology includes depositing first and second overlying film layers on a semiconductor substrate and patterning the layers to define an overlay target. The target includes a first grating pattern in the first layer, including at least a first linear grating oriented in a first direction and at least a second linear grating oriented in a second direction perpendicular to the first direction, and a second grating pattern in the second layer, including at least a third linear grating identical to the first linear grating and a fourth linear grating identical to the second linear grating. The second grating pattern has a nominal offset relative to the first grating pattern by first and second displacements in the first and second directions, respectively. A scatterometric image of the substrate is captured and processed to estimate an overlay error between the patterning of the first and second layers.

Abstract: An overlay metrology system with pitches in multiple directions in a single cell is disclosed. The overlay target may, according to a metrology recipe, include a multi-layer structure on two or more layers of a cell of the sample. The multi-layer structure may include structures in each layer having one or more pitches in one or more directions of periodicity. The multi-layer structure may include structures with a first pitch in a first direction, a second pitch in a second direction, a third pitch in the first direction, and a fourth pitch in the second direction. At least one of the first pitch or the third pitch may be different than at least one of the second pitch or the fourth pitch.

Abstract: An overlay metrology system may include an illumination source and illumination optics to illuminate an overlay target on a sample with illumination from the illumination source as the sample is in motion with respect to the illumination from the illumination source in accordance with a measurement recipe. The overlay target may include one or more cells, where a single cell is suitable for measurement along a particular direction. Such a cell may include two or more gratings with different pitches. Further, the system may include two or more photodetectors, each configured to capture three diffraction lobes from the two or more grating structures. The system may further include a controller to determine an overlay measurement associated with each cell of the overlay target.

Abstract: A system includes an illumination source configured to generate an illumination beam, and a collection sub-system that includes an objective lens, one or more detectors located at a collection pupil plane, a light modulator, and a controller. The light modulator is configured to direct one or more selected portions of measurement light to the one or more detectors. The controller includes one or more processors configured to execute program instructions causing the one or more processors to execute a metrology recipe by: receiving detection signals from the one or more detectors, wherein the detection signals are associated with the one or more selected portions of the measurement light directed to the one or more detectors; and generating an overlay measurement associated with at least two layers of a sample based on the detection signals.

Abstract: An overlay metrology system may include an illumination an illumination source to generate an illumination beam, one or more illumination optics to direct the illumination beam to an overlay target on a sample as the sample is scanned relative to the illumination beam along a scan direction, the target including one or more cells having Moiré structures. The system may also include two photodetectors at locations of a pupil plane associated with Moiré or overlapping diffraction orders from the Moiré structures. The system may then generate overlay measurements based on time-varying interference signals captured by the detector as the sample is scanned.

Abstract: Metrology is performed on a semiconductor wafer using a system with an apodizer. A spot is formed on the semiconductor wafer with a diameter from 2 nm to 5 nm. The associated beam of light has a wavelength from 400 nm to 800 nm. Small target measurement can be performed at a range of optical wavelengths.

Abstract: An overlay metrology system may include an illumination source and illumination optics to illuminate an overlay target on a sample with illumination from the illumination source as the sample is in motion with respect to the illumination from the illumination source in accordance with a measurement recipe. The overlay target may include one or more cells, where a single cell is suitable for measurement along a particular direction. Such a cell may include two or more gratings with different pitches. Further, the system may include two or more photodetectors, each configured to capture three diffraction lobes from the two or more grating structures. The system may further include a controller to determine an overlay measurement associated with each cell of the overlay target.

Abstract: A target for use in the measurement of misregistration between layers formed on a wafer in the manufacture of semiconductor devices, the target including a first pair of periodic structures (FPPS) and a second pair of periodic structures (SPPS), each of the FPPS and the SPPS including a first edge, a second edge, a plurality of first periodic structures formed in a first area as part of a first layer and having a first pitch along a first pitch axis, the first pitch axis not being parallel to either of the first edge or second edge, and a plurality of second periodic structures formed in a second area as part of a second layer and having the first pitch along a second pitch axis, the second pitch axis being generally parallel to the first pitch axis.

Abstract: A metrology target is disclosed, in accordance with one or more embodiments of the present disclosure. The metrology target includes a first set of pattern elements having a first pitch, where the first set of pattern elements includes segmented pattern elements. The metrology target includes a second set of pattern elements having a second pitch, where the second set of pattern elements includes segmented pattern elements. The metrology target includes a third set of pattern elements having a third pitch, where the third set of pattern elements includes segmented pattern elements.

Abstract: A metrology target is disclosed, in accordance with one or more embodiments of the present disclosure. The metrology target includes a first set of pattern elements having a first pitch, where the first set of pattern elements includes segmented pattern elements. The metrology target includes a second set of pattern elements having a second pitch, where the second set of pattern elements includes segmented pattern elements. The metrology target includes a third set of pattern elements having a third pitch, where the third set of pattern elements includes segmented pattern elements.

Abstract: A target for use in the measurement of misregistration between layers formed on a wafer in the manufacture of semiconductor devices, the target including a first pair of periodic structures (FPPS) and a second pair of periodic structures (SPPS), each of the FPPS and the SPPS including a first edge, a second edge, a plurality of first periodic structures formed in a first area as part of a first layer and having a first pitch along a first pitch axis, the first pitch axis not being parallel to either of the first edge or second edge, and a plurality of second periodic structures formed in a second area as part of a second layer and having the first pitch along a second pitch axis, the second pitch axis being generally parallel to the first pitch axis.