Patents by Inventor Itshak Afriat
Itshak Afriat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10712949Abstract: A system and method for reducing performance penalties of a host that is supplying a host memory buffer (HMB) for use by a storage device. The method may include modeling desired HMB access timing by the storage device in an initial offline analysis for multiple classes of workloads, periodically updating the access timing data stored in the storage device based on actual use and using the current HMB access timing information to modify storage device access to the HMB on the host. The system may include a storage device controller that quantifies different HMB access timing for different host workloads based on individual HMB regions.Type: GrantFiled: November 9, 2017Date of Patent: July 14, 2020Assignee: Western Digital Technologies, Inc.Inventors: Judah Gamliel Hahn, Alon Marcu, Itshak Afriat, Shay Benisty, Ariel Navon, Alex Bazarsky
-
Patent number: 10564868Abstract: A method and apparatus for selecting power states in storage devices for computers including providing monitoring storage device parameters and comparing those parameters to endurance thresholds to increase reliability of the storage device.Type: GrantFiled: January 24, 2018Date of Patent: February 18, 2020Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Itshak Afriat, Judah Gamliel Hahn, Karin Inbar
-
Publication number: 20190227725Abstract: A method and apparatus for selecting power states in storage devices for computers including providing monitoring storage device parameters and comparing those parameters to endurance thresholds to increase reliability of the storage device.Type: ApplicationFiled: January 24, 2018Publication date: July 25, 2019Inventors: Itshak AFRIAT, Judah Gamliel HAHN, Karin INBAR
-
Publication number: 20190138220Abstract: A system and method for reducing performance penalties of a host that is supplying a host memory buffer (HMB) for use by a storage device. The method may include modeling desired HMB access timing by the storage device in an initial offline analysis for multiple classes of workloads, periodically updating the access timing data stored in the storage device based on actual use and using the current HMB access timing information to modify storage device access to the HMB on the host. The system may include a storage device controller that quantifies different HMB access timing for different host workloads based on individual HMB regions.Type: ApplicationFiled: November 9, 2017Publication date: May 9, 2019Applicant: Western Digital Technologies, Inc.Inventors: Judah Gamliel Hahn, Alon Marcu, Itshak Afriat, Shay Benisty, Ariel Navon, Alex Bazarsky
-
Patent number: 10055164Abstract: A device includes a non-volatile memory, first circuitry configured to communicate with the non-volatile memory, and second circuitry configured to communicate with an access device. The second circuitry is configured to retrieve data and metadata associated with the data from a volatile memory of the access device based on a request for the data. The request is received from the first circuitry and includes a first identifier. The metadata includes a second identifier. The second circuitry is further configured to provide at least a portion of the data to the first circuitry in response to the first identifier matching the second identifier.Type: GrantFiled: December 30, 2016Date of Patent: August 21, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Shay Benisty, Ishai Ilani, Judah Gamliel Hahn, Itshak Afriat, Alon Marcu, Erez Frank
-
Publication number: 20180067684Abstract: A device includes a non-volatile memory, first circuitry configured to communicate with the non-volatile memory, and second circuitry configured to communicate with an access device. The second circuitry is configured to retrieve data and metadata associated with the data from a volatile memory of the access device based on a request for the data. The request is received from the first circuitry and includes a first identifier. The metadata includes a second identifier. The second circuitry is further configured to provide at least a portion of the data to the first circuitry in response to the first identifier matching the second identifier.Type: ApplicationFiled: December 30, 2016Publication date: March 8, 2018Inventors: SHAY BENISTY, ISHAI ILANI, JUDAH GAMLIEL HAHN, ITSHAK AFRIAT, ALON MARCU, EREZ FRANK
-
Patent number: 9678684Abstract: Systems and methods for performing an adaptive sustain write are disclosed. In one implementation, a controller of a non-volatile memory that is coupled with a host system monitors a rate at which the host system sends user data to the non-volatile memory system for storage and determines that the rate at which the host system sends user data to the non-volatile memory system for storage exceeds a threshold. The controller stores a first portion of the user data in one or more user capacity memory blocks of the non-volatile memory system. Additionally, the controller stores a second portion of the user data in one or more over-provisioning memory blocks of the non-volatile memory system after determining that the rate at which the host system sends data to the non-volatile memory system for storage exceeds the threshold.Type: GrantFiled: October 7, 2015Date of Patent: June 13, 2017Assignee: SANDISK TECHNOLOGIES LLCInventor: Itshak Afriat
-
Publication number: 20170102877Abstract: Systems and methods for performing an adaptive sustain write are disclosed. In one implementation, a controller of a non-volatile memory that is coupled with a host system monitors a rate at which the host system sends user data to the non-volatile memory system for storage and determines that the rate at which the host system sends user data to the non-volatile memory system for storage exceeds a threshold. The controller stores a first portion of the user data in one or more user capacity memory blocks of the non-volatile memory system. Additionally, the controller stores a second portion of the user data in one or more over-provisioning memory blocks of the non-volatile memory system after determining that the rate at which the host system sends data to the non-volatile memory system for storage exceeds the threshold.Type: ApplicationFiled: October 7, 2015Publication date: April 13, 2017Applicant: SanDisk Technologies Inc.Inventor: Itshak Afriat
-
Patent number: 9612904Abstract: In one embodiment, a memory system is provided comprising a volatile memory, a non-volatile memory, and an error correction code (ECC) module. The ECC module is configured to encode, decode, and correct data stored in the volatile memory when the memory system enters and exits a sleep mode and is further configured to encode, decode, and correct data stored in the non-volatile memory when the memory system is in an active mode.Type: GrantFiled: April 28, 2015Date of Patent: April 4, 2017Assignee: SanDisk Technologies LLCInventors: Asaf Gueta, Arseniy Aharonov, Inon Cohen, Rotem Bahar, Oran DeBotton, Tzachy Yizhaki, Itshak Afriat
-
Publication number: 20160224418Abstract: A memory system and method for securing volatile memory during sleep mode using the same ECC module used to secure non-volatile memory during active mode are provided. In one embodiment, a memory system is provided comprising a volatile memory, a non-volatile memory, and an error correction code (ECC) module. The ECC module is configured to encode, decode, and correct data stored in the volatile memory when the memory system enters and exits a sleep mode and is further configured to encode, decode, and correct data stored in the non-volatile memory when the memory system is in an active mode. Other embodiments are possible.Type: ApplicationFiled: April 28, 2015Publication date: August 4, 2016Applicant: SanDisk Technologies Inc.Inventors: Asaf Gueta, Arseniy Aharonov, Inon Cohen, Rotem Bahar, Oran DeBotton, Tzachy Yizhaki, Itshak Afriat
-
Publication number: 20150178188Abstract: A storage module and method for re-enabling preloading of data in the storage module are disclosed. In one embodiment, a storage module is provided with a memory and a register. In response to receiving a register-setting command, the storage module sets a value in the register to enable preloading of data in the memory. The storage module then receives the data for storage in the memory. After the storage module has determined that all of the data has been received, the storage module changes the value in the register to disable further preloading of data. In response to receiving a register-resetting command, the storage module resets the value in the register to re-enable preloading of data even though the storage module already changed the value in the register to disable further preloading of data.Type: ApplicationFiled: December 20, 2013Publication date: June 25, 2015Applicant: SanDisk Technologies Inc.Inventors: Lola Grin, Itshak Afriat, Einat Lev, Idit Gabbay, Rotem Sela
-
Patent number: 8407399Abstract: Methods, apparatus and computer medium for enforcing one or more cache management policies are disclosed herein. In some embodiments, a flash memory of a storage device includes a plurality of flash memory dies each flash memory die including a respective cache storage area and a respective main storage area. A determination is made, for data that is received from an external host device to which main storage area the received data is addressed thereby specifying one of the plurality of flash memory dies as a target die for the received data. Whenever the received data is written into a cache storage area before being written into a main storage area, the received data is written into the cache storage area of the specified target die.Type: GrantFiled: October 29, 2008Date of Patent: March 26, 2013Assignee: SanDisk IL Ltd.Inventors: Menahem Lasser, Itshak Afriat, Opher Lieber
-
Patent number: 8400854Abstract: The non-volatile storage system predicts which blocks (or other units of storage) will become bad based on performance data. User data in those blocks predicted to become bad can be re-programmed to other blocks, and the blocks predicted to become bad can be removed from further use.Type: GrantFiled: January 26, 2010Date of Patent: March 19, 2013Assignee: SanDisk Technologies Inc.Inventors: Gen Pei, Lanlan Gu, Nima Mokhlesi, Idan Alrod, Eran Sharon, Itshak Afriat
-
Publication number: 20110063918Abstract: The non-volatile storage system predicts which blocks (or other units of storage) will become bad based on performance data. User data in those blocks predicted to become bad can be re-programmed to other blocks, and the blocks predicted to become bad can be removed from further use.Type: ApplicationFiled: January 26, 2010Publication date: March 17, 2011Inventors: Gen Pei, Lanlan Gu, Nima Mokhlesi, Idan Alrod, Eran Sharon, Itshak Afriat
-
Patent number: 7865658Abstract: A method and system for balancing host write operations and cache flushing is disclosed. The method may include steps of determining an available capacity in a cache storage portion of a self-caching storage device, determining a ratio of cache flushing steps to host write commands if the available capacity is below a desired threshold and interleaving cache flushing steps with host write commands to achieve the ratio. The cache flushing steps may be executed by maintaining a storage device busy status after executing a host write command and utilizing this additional time to copy a portion of the data from the cache storage into the main storage. The system may include a cache storage, a main storage and a controller configured to determine and execute a ratio of cache flushing steps to host write commands by executing cache flushing steps while maintaining a busy status after a host write command.Type: GrantFiled: December 31, 2007Date of Patent: January 4, 2011Assignee: SanDisk IL Ltd.Inventors: Menahem Lasser, Itshak Afriat, Opher Lieber, Mark Shlick
-
Publication number: 20090172286Abstract: A method and system for balancing host write operations and cache flushing is disclosed. The method may include steps of determining an available capacity in a cache storage portion of a self-caching storage device, determining a ratio of cache flushing steps to host write commands if the available capacity is below a desired threshold and interleaving cache flushing steps with host write commands to achieve the ratio. The cache flushing steps may be executed by maintaining a storage device busy status after executing a host write command and utilizing this additional time to copy a portion of the data from the cache storage into the main storage. The system may include a cache storage, a main storage and a controller configured to determine and execute a ratio of cache flushing steps to host write commands by executing cache flushing steps while maintaining a busy status after a host write command.Type: ApplicationFiled: December 31, 2007Publication date: July 2, 2009Inventors: Menahem Lasser, Itshak Afriat, Opher Lieber, Mark Shlick
-
Publication number: 20090172246Abstract: A host may initialize itself faster by enabling an associated storage device to respond to host access commands under specified conditions before the storage device has completed its own initialization. Embodiments of the invention include a storage device, a controller, a method of servicing commands, and a method of using a host that sends access commands to a storage device. Access commands to a flash memory use logical addresses to reference the memory contents. A controller translates the logical addresses to physical addresses using a mapping table that the controller constructs in volatile memory during initialization based on data retrieved from the flash memory. An access command satisfying a predefined condition is serviced before the controller completes the construction of the mapping table.Type: ApplicationFiled: December 26, 2007Publication date: July 2, 2009Applicant: SanDisk IL Ltd.Inventor: Itshak Afriat