Abstract: A driving circuit for providing a control signal to a power semiconductor device for providing power to a filament lamp, said driving circuit comprising an oscillator for generating said control signal. The driving circuit may further comprise a soft start circuit which controls said oscillator so as to avoid excessive current in said lamp at start-up; a voltage compensation circuit which controls said oscillator so as to compensate for variations in load; a shutdown circuit for shutting down and automatically restarting said oscillator in response to a fault condition; an adaptive dead time circuit which controls said oscillator for providing cool running of said power semiconductor device; and/or a dimming circuit which controls said oscillator for driving said lamp. The driving circuit and its control circuitry may be implemented in an integrated circuit.

Abstract: A high voltage offset detection circuit registers the voltage at the midpoint of a switching half-bridge and may determine when the midpoint voltage reaches a given value to avoid hard-switching in the half-bridge switches. The midpoint voltage of the switching half-bridge is applied through a buffer to a MOSFET that is current limited to produce a voltage that reflects the voltage of the midpoint of the switching half-bridge. The voltage produced by the MOSFET may be supplied to a comparator with a threshold input to obtain a signal that indicates when the switches of the switching half-bridge may be turned on to avoid hard-switching. An adaptive dead-time circuit and method may comprise the above sensing circuit, a first circuit for generating a first signal indicative of a high to low transition of the midpoint voltage; and an output circuit for generating an adaptive dead-time output signal based thereon.

Abstract: A driving circuit for providing a control signal to a power semiconductor device for providing power to a filament lamp, said driving circuit comprising an oscillator for generating said control signal. The driving circuit may further comprise a soft start circuit which controls said oscillator so as to avoid excessive current in said lamp at start-up; a voltage compensation circuit which controls said oscillator so as to compensate for variations in load; a shutdown circuit for shutting down and automatically restarting said oscillator in response to a fault condition; an adaptive dead time circuit which controls said oscillator for providing cool running of said power semiconductor device; and/or a dimming circuit which controls said oscillator for driving said lamp. The driving circuit and its control circuitry may be implemented in an integrated circuit.

Abstract: A driving circuit for providing a control signal to a power semiconductor device for providing power to a filament lamp, said driving circuit comprising an oscillator for generating said control signal. The driving circuit may further comprise a soft start circuit which controls said oscillator so as to avoid excessive current in said lamp at start-up; a voltage compensation circuit which controls said oscillator so as to compensate for variations in load; a shutdown circuit for shutting down and automatically restarting said oscillator in response to a fault condition; an adaptive dead time circuit which controls said oscillator for providing cool running of said power semiconductor device; and/or a dimming circuit which controls said oscillator for driving said lamp. The driving circuit and its control circuitry may be implemented in an integrated circuit.

Abstract: A dual range oscillator provides two different ranges of oscillator frequency output based on switched current sources charging a capacitor. As several current sources are combined to charge capacitor, the interval for charging the capacitor decreases and changes the oscillator frequency output accordingly. A reference voltage supplied to a comparator checks the voltage on the capacitor to determine when to combine current sources to charge the capacitor and modify the timing interval and the corresponding oscillator frequency output. The different current sources are switched to the capacitor to provide modified charging slopes. The dual slope, dual range oscillator permits frequency switching operation in a variety of environments and applications with a simplified control and integration into a single chip.

Abstract: A high voltage offset detection circuit registers the voltage at the midpoint of a switching half-bridge and may determine when the midpoint voltage reaches a given value to avoid hard-switching in the half-bridge switches. The midpoint voltage of the switching half-bridge is applied through a buffer to a MOSFET that is current limited to produce a voltage that reflects the voltage of the midpoint of the switching half-bridge. The voltage produced by the MOSFET may be supplied to a comparator with a threshold input to obtain a signal that indicates when the switches of the switching half-bridge may be turned on to avoid hard-switching. An adaptive dead-time circuit and method may comprise the above sensing circuit, a first circuit for generating a first signal indicative of a high to low transition of the midpoint voltage; and an output circuit for generating an adaptive dead-time output signal based thereon.

Abstract: A dual range oscillator provides two different ranges of oscillator frequency output based on switched current sources charging a capacitor. As several current sources are combined to charge capacitor, the interval for charging the capacitor decreases and changes the oscillator frequency output accordingly. A reference voltage supplied to a comparator checks the voltage on the capacitor to determine when to combine current sources to charge the capacitor and modify the timing interval and the corresponding oscillator frequency output. The different current sources are switched to the capacitor to provide modified charging slopes. The dual slope, dual range oscillator permits frequency switching operation in a variety of environments and applications with a simplified control and integration into a single chip.

Abstract: A radiation resistant MOSFET is formed by a reduced mask process in which gate oxide is formed after the high temperature diffusion steps needed to diffuse the base and source regions. The base diffusion depth is substantially less than 3.0 microns and preferably is about 1.3 microns. Self alignment to hard oxide edge, instead of poly, can be used.

Abstract: A driving circuit for providing a control signal to a power semiconductor device for providing power to a filament lamp, said driving circuit comprising an oscillator for generating said control signal. The driving circuit may further comprise a soft start circuit which controls said oscillator so as to avoid excessive current in said lamp at start-up; a voltage compensation circuit which controls said oscillator so as to compensate for variations in load; a shutdown circuit for shutting down and automatically restarting said oscillator in response to a fault condition; an adaptive dead time circuit which controls said oscillator for providing cool running of said power semiconductor device; and/or a dimming circuit which controls said oscillator for driving said lamp. The driving circuit and its control circuitry may be implemented in an integrated circuit.

Abstract: A high voltage radiation hardened power integrated circuit (PIC) with resistance to TID and SEE radiation effects for application in high radiation environments, such as outer space. TID hardness modification include forming gate oxide layers after high temperature junction processes, adding implant layers to raise the parasitic MOSFET thresholds with respect to native thresholds, and suppressing CMOS drain-to-source and intrawell transistor-to-transistor leakage. In addition, radhard field oxide is utilized. SEE ruggedness is improved by reducing the epi thickness over that of non-radhard devices, and increasing the epi concentration near the substrate junction. A radhard PIC rated to 400 V and capable of operating at 600 V or more is provided. The inventive PIC can withstand 100 krads of TID and a heavy ion Linear Energy Transfer of 37 MeV/(mg/cm2) at full rated voltage.

Abstract: A high voltage radiation hardened power integrated circuit (PIC) with resistance to TID and SEE radiation effects for application in high radiation environments, such as outer space. TID hardness modification include forming gate oxide layers after high temperature junction processes, adding implant layers to raise the parasitic MOSFET thresholds with respect to native thresholds, and suppressing CMOS drain-to-source and intrawell transistor-to-transistor leakage. In addition, radhard field oxide is utilized. SEE ruggedness is improved by reducing the epi thickness over that of non-radhard devices, and increasing the epi concentration near the substrate junction. A radhard PIC rated to 400 V and capable of operating at 600 V or more is provided. The inventive PIC can withstand 100 krads of TID and a heavy ion Linear Energy Transfer of 37 MeV/(mg/cm2) at full rated voltage.