Patents by Inventor Iu-Lin Lih

Iu-Lin Lih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5349565
    Abstract: A latch ram including on a single chip a memory array, an address latch and associated row and column decoders for addressing particular locations within the memory array, data I/O and associated column I/O circuitry for inputting data to and outputting data from the memory array, and microprocessor-controlled logic for controlling the input and output of such data. The device is packaged in a 28-pin DIP or SO package.
    Type: Grant
    Filed: September 5, 1991
    Date of Patent: September 20, 1994
    Assignee: MOS Electronics Corporation
    Inventors: Sheau-Dong Wu, Iu-Lin Lih