Abstract: A dynamic column redundancy replacement system for programming and reading a non-volatile memory system includes an input data replacement logic block and an output data replacement logic block. A column redundancy match logic block compares a user address to latched fuse addresses of bad columns and identifies address matches to facilitate the replacement of bits from defective memory cells with replacement redundancy bits.

Abstract: A dynamic column redundancy replacement system for programming and reading a non-volatile memory system includes an input data replacement logic block and an output data replacement logic block. A column redundancy match logic block compares a user address to latched fuse addresses of bad columns and identifies address matches to facilitate the replacement of bits from defective memory cells with replacement redundancy bits. For a program mode of operation, a multi-bit data program redundancy register stores actual redundant input data information and a FIFO register masks internal operations of the memory controller logic while a user is sending data. For a read mode of operation, actual redundant output information is stored in a multi-bit data read redundancy register such that, if a match is found, data from the shift register is replaced with redundant data bits and sent to the data output terminal to provide dynamic replacement of data bits from defective non-volatile memory cells.

Abstract: A method, device, and processor-readable medium for testing semiconductor devices. A method for testing a semiconductor device comprises: a) entering a multi-byte programming mode; b) programming a plurality of bytes, each byte programmed with identical data; and c) verifying each programmed byte one byte at a time, returning to step b) if any byte fails to verify, otherwise waiting for a next command.