Abstract: Methods and devices for generating program code representations may include receiving program code or edited program code for an application executing on the computer device. The methods and devices may include receiving an identification of a selected pipeline from a plurality of pipelines that defines a plurality of passes of actions to execute on the program code or the edited program code to optimize the program code or the edited program code. The methods and devices may include running the selected pipeline and generate optimizer output with a program code representation of the program code.

Abstract: Methods and devices for performing variable rate shading are described. Invocation information and lineage information for each pixel of a plurality of pixels of a primitive are stored in an invocation buffer and a lineage buffer of a graphics processing unit. One or more deferred shading or post-processing operations are performed on the image based at least in part on the invocation information and the lineage information associated with each pixel of the plurality of pixels.

Abstract: Techniques are described for semantically comparing machine code traces generated by compilers that compile computer software code. For example, a trace of machine code generated by a compiler can be obtained. The trace can be transformed into a set of expressions in a uniform expression format (e.g., by performing translation of the trace instructions into corresponding expressions and/or by performing other transformations). The set of expressions in the uniform expression format can be compared to other sets of expressions in the uniform expression format (e.g., other sets of expressions created from traces of machine code from other compilers). Results of the comparison can comprise indications of whether the sets of expressions match.

Abstract: Examples described herein generally relate to systems and method for streaming a video game at a client device. The client device may transmit video game controls to a streaming server. The client device may receive a video stream encoding video images generated in response to the video game controls from the streaming server. The client device may determine that a video image of the video stream to display in a frame has not been completely received at a designated time prior to display of the frame. The client device may determine an image transformation based on a history of the video images and motion vectors for the video stream. The client device may apply the image transformation to a portion of one or more images corresponding to previous frames. The client device may display a substitute video image in the frame including the portion of the transformed image.

Abstract: Techniques are described for semantically comparing machine code traces generated by compilers that compile computer software code. For example, a trace of machine code generated by a compiler can be obtained. The trace can be transformed into a set of expressions in a uniform expression format (e.g., by performing translation of the trace instructions into corresponding expressions and/or by performing other transformations). The set of expressions in the uniform expression format can be compared to other sets of expressions in the uniform expression format (e.g., other sets of expressions created from traces of machine code from other compilers). Results of the comparison can comprise indications of whether the sets of expressions match.

Abstract: Flexible, dynamic, and efficient compression and de-compression mechanisms are described. An example compression mechanism includes reading a plurality of groups of indices, identifying a smallest index in each of the plurality of groups, rotating indices in each of the plurality of groups such that the smallest index is a first value, calculating unsigned delta encoded values relative to the smallest index in each of the plurality of groups for remaining indices, converting the plurality of groups of indices into a plurality of compressed groups of indices, and storing the plurality of compressed groups of indices. An example de-compression mechanism include reading a plurality of compressed groups of indices, identifying a first index as an absolute value in each of the plurality of groups, calculating remaining indices of each of the plurality of groups, and converting the plurality of compressed groups of indices into a plurality of decompressed groups of indices.

Abstract: Among the various embodiments disclosed herein are example methods for using real-time raytracing in a hybrid approach along with screen space reflections. In certain implementations, the two approaches are combined in a process that decides whether to use screen space reflections or raytracing for a given pixel during a preliminary analysis (pre-pass) of the pixel to be rendered.

Abstract: Methods and devices for index buffer block compression in a computer system include a compressor in communication with a graphical processing unit (GPU). The methods and devices include selecting one or more primitives of at least a portion of a mesh formed by a total number of primitives for inclusion within a compressed index buffer block, the one or more primitives each associated with a number of indices each corresponding to a vertex within the mesh. The methods and devices may identify at least one redundant index in the number of indices associated with the one or more primitives of the compressed index buffer block. The methods and devices removing the at least one redundant index from the number of indices associated with the one or more primitives of the compressed index buffer block to form the compressed index buffer block as a set of one or more unique indices.

Abstract: Methods and devices for performing variable rate shading in graphics processing are described. A transformation pass can be performed over a current frame associate a current pixel in a current frame with a previous pixel in a previous frame. A previous fragment, including the previous pixel, in the previous frame can be analyzed to determine whether the previous fragment includes one or more areas of frequency detail achieving a threshold. A variable shading rate to apply to a current fragment including the current pixel can be determined based on analyzing the previous fragment.

Abstract: To optimize the compilation of shaders for execution within an application, a computer system discovers the context in which the shaders are executed. The application is compiled and executed on a target platform. Snapshots of the application during execution are captured. A snapshot includes data and commands passed between the central processing unit and the graphics processing unit of the target platform to generate a single frame of graphics data. The shaders used in these snapshots are identified. These shaders are compiled with a number of different permutations of available compiler options, resulting in sets of differently compiled shaders. The snapshot is re-executed with the sets of differently compiled shaders, and performance is measured. The set of compiler options that results in compiled shaders providing better performance can be used as the set of compilation parameters for the set of shaders for this application.

Abstract: Methods and devices for managing first-in first-out (FIFO) queues in graphics processing are described. A write operation can be executed by multiple write threads on a graphics processing unit (GPU) to write data to memory locations in the multiple pages of memory. The write operation can also include allocating additional pages of memory for the FIFO queue where a write allocation pointer is determined to achieve a threshold, such to grow the FIFO queue before the memory is actually needed for writing. Similarly, comprises a read operation can be executed by multiple read threads to read data from the memory locations. The read operation can also include deallocating pages of memory back to a memory pool where a read done pointer is determined to achieve a threshold, such as an end of a page.

Abstract: Methods and devices for generating program code representations may include receiving program code or edited program code for an application executing on the computer device. The methods and devices may include receiving an identification of a selected pipeline from a plurality of pipelines that defines a plurality of passes of actions to execute on the program code or the edited program code to optimize the program code or the edited program code. The methods and devices may include running the selected pipeline and generate optimizer output with a program code representation of the program code.

Abstract: Among the various embodiments disclosed herein are example methods for using real-time raytracing in a hybrid approach along with screen space reflections. In certain implementations, the two approaches are combined in a process that decides whether to use screen space reflections or raytracing for a given pixel during a preliminary analysis (pre-pass) of the pixel to be rendered.

Abstract: Methods and devices for graphics shading in a computing device. The methods and devices may include receiving a respective cache line of a plurality of cache lines of a shader stored in a memory, wherein the respective cache line and one or more other ones of the plurality of cache lines include at least one jump instruction. Further, the methods and devices may include executing the respective cache line of the shader and skipping to a next portion of the plurality of cache lines based on the at least one jump instruction. Moreover, the methods and devices may include executing one or more prefetchers contemporaneously with the shader in response to the at least one jump instruction, each prefetcher requesting a subsequent one of the plurality of cache lines from the memory, wherein each prefetcher corresponds to a respective jump instruction.

Abstract: Methods and devices for rendering graphics in a computer system include a graphical processing unit (GPU) with a flexible, dynamic, application-directed mechanism for varying the rate at which fragment shading is performed for rendering an image to a display. In particular, the described aspects include determining, at a rasterization stage, map coordinates based on coarse scan converting a primitive of an object, the map coordinates indicating a location on a sampling rate parameter (SRP) map of a fragment within the primitive of the object, and identifying a lookup value for the fragment within the primitive of the object based at least on map coordinates, and calculating a respective fragment variable SRP value for the fragment within the primitive of the object based at least on the lookup value.

Abstract: Methods and devices for generating program code representations may include receiving program code or edited program code for an application executing on the computer device. The methods and devices may include receiving an identification of a selected pipeline from a plurality of pipelines that defines a plurality of passes of actions to execute on the program code or the edited program code to optimize the program code or the edited program code. The methods and devices may include running the selected pipeline and generate optimizer output with a program code representation of the program code.

Abstract: Methods and devices for performing pixel shading in graphics processing are described. Multiple primitives of an image can be shaded at one or more variable shading rates. A subset of pixels, in at least one screen-space tile corresponding to a portion of the image, corresponding to samples that are shaded in the shading at the one or more variable shading rates, can be determined. One or more deferred passes can be applied to the subset of pixels in the at least one screen-space tile to provide additional shading of the subset of pixels. After completing the deferred passes, the set of pixels not processed by the deferred passes can be filled using adjacent shaded pixels.

Abstract: Various approaches to performing non-divergent parallel traversal operations for a bounding volume hierarchy (“BVH”) during ray tracing are presented. For example, a computer system has a processing unit with threads that, collectively, perform ray tracing for a group of rays in parallel in a computer-represented environment, which includes geometric objects (such as triangles) enclosed in the BVH. Each of the threads receives parameters for a given ray and traverses the BVH to determine an intersection, if any, between the given ray and one of the geometric objects. The order of traversal of the BVH is synchronized between threads for the rays of the group, for example, using a cross-group operation such as a ballot operation. In this way, the overall speed of the BVH traversal can be improved in many cases, while avoiding code divergence and data divergence in extra-wide single-instruction, multiple data (“SIMD”) graphics processing unit (“GPU”) architectures.

Abstract: To optimize the compilation of shaders for execution within an application, a computer system discovers the context in which the shaders are executed. The application is compiled and executed on a target platform. Snapshots of the application during execution are captured. A snapshot includes data and commands passed between the central processing unit and the graphics processing unit of the target platform to generate a single frame of graphics data. The shaders used in these snapshots are identified. These shaders are compiled with a number of different permutations of available compiler options, resulting in sets of differently compiled shaders. The snapshot is re-executed with the sets of differently compiled shaders, and performance is measured. The set of compiler options that results in compiled shaders providing better performance can be used as the set of compilation parameters for the set of shaders for this application.

Abstract: Enhanced data buffer control in data systems is presented herein. In one example, a method of handling data buffer resources in a graphics processor includes establishing a pool of available memory pages tracked by memory pointers for use in a growable data structure. Responsive to requests by at least a shader unit of the graphics processor for space in the growable data structure in which to write shader data, the method includes providing to the shader unit at least write pointers to locations within memory pages from the growable data structure in accordance with data sizes indicated in the requests. Responsive to exceeding a threshold fullness of the growable data structure, the method includes allocating at least one further memory page from the pool of available memory pages for inclusion in the growable data structure.