Abstract: A tire pressure monitoring device and system includes a support or housing mounted to a rim of a wheel of a vehicle. A casing is movably secured to the support and a pair of spaced magnets are disposed within the casing. The casing is collapsible for varying the length of the casing in response to changes in the tire pressure to move the magnets relative to each other. A sensor is mounted a distance from the casing for sensing a presence of each of the magnets. A controller is in communication with the sensor to determine the length of the casing and the relative movement between the magnets to calculate any changes in tire pressure.

Abstract: A tire pressure monitoring device and system includes a support or housing mounted to a rim of a wheel of a vehicle. A casing is movably secured to the support and a pair of spaced magnets are disposed within the casing. The casing is collapsible for varying the length of the casing in response to changes in the tire pressure to move the magnets relative to each other. A sensor is mounted a distance from the casing for sensing a presence of each of the magnets. A controller is in communication with the sensor to determine the length of the casing and the relative movement between the magnets to calculate any changes in tire pressure.

Abstract: A flexible built-in self-test (BIST) circuit is incorporated into an integrated circuit (IC) for testing one or random access memories or other memories embedded in an integrated circuit regardless of the number, size or test requirements of the memories. Input data from a controller that may be conveniently partitioned among components internal and external to the IC, supplies data to the BIST circuit indicating the size of the embedded memories to be tested and selecting from among several modes of BIST operation.

Abstract: A flexible built-in self-test (BIST) circuit is incorporated into an integrated circuit (IC) for testing one or random access memories or other memories embedded in an integrated circuit regardless of the number, size or test requirements of the memories. Input data from a controller that may be conveniently partitioned among components internal and external to the IC, supplies data to the BIST circuit indicating the size of the embedded memories to be tested and selecting from among several modes of BIST operation.

Abstract: A field programmable gate array (FPGA) and a decryption circuit are implemented within a common integrated circuit (IC) or within separate ICs enclosed within a common IC package. The decryption circuit decrypts an input FPGA program encrypted in accordance with a particular encryption key and then writes the decrypted FPGA program into the FPGA. Thus an FPGA program encrypted in accordance with a particular encryption key can be used to program only those FPGAs coupled with a decryption circuit capable of decoding the encrypted FPGA program in accordance with that particular encryption key. Since the decryption circuit and the FPGA are implemented in the same IC, or within the same IC package, the decrypted FPGA program the decryption circuit produces cannot be readily intercepted and copied.

Abstract: A built-in replacement analysis (BIRA) circuit allocates spare rows and columns of cells for replacing rows and columns of an array of memory cells in response to an input sequence of cell addresses, each identifying a row address and a column address of each defective cell of the cell array. The BIRA subsystem, including a row register corresponding each spare row and a column register corresponding to each spare column, responds to incoming cell addresses by writing their included row address into the row registers, by writing their column addresses into the column registers, and by writing link bits into the column registers. Each link bit links a row and a column register by storing row and column addresses of a defective cell. The BIRA subsystem also writes a “multiple cell” bit into each row register to indicate when the row address it stores includes more than one defective cell.