Patents by Inventor Ivor Evans

Ivor Evans has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of integrating the fabrication of a diffused shallow well N type JFET device and a P channel MOSFET device
    Publication number: 20020197779
    Abstract: A process for integrating the fabrication of an N type, junction field effect transistor (NJFET), device, with the fabrication and a high voltage, P channel metal oxide semiconductor (PMOS), device, has been developed. The process includes the formation of a deep N well region for accommodation of the high voltage, PMOS device, while a shallow N well region is used to contain the NJFET device. Featured in the integrated fabrication sequence is the simultaneous formation of P type source/drain regions for the high voltage PMOS device, and the P type gate structure of the NJFET device.
    Type: Application
    Filed: July 2, 2001
    Publication date: December 26, 2002
    Applicant: European Semiconductor Manufacturing Limited
    Inventor: Ivor Evans