Abstract: Piezoelectric nitride compound materials with improved properties are provided. The piezoelectric material comprises aluminum, nitrogen and binary and ternary dopants that can be selected from silver, niobium and/or scandium or from silver and/or niobium.

Abstract: Piezoelectric nitride compound materials with improved properties is provided. The piezoelectric material comprises aluminium, nitrogen and ternary and quaternary dopants that can be selected from calcium, ruthenium, boron and/or yttrium.

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: A crystalline perovskite crystalline composite paraelectric material includes nano-regions containing rich N3? anions dispersed in a nano-grain sized matrix of crystalline oxide perovskite material, wherein (ABO3??)?-(ABO3????N?)1??. A represents a divalent element, B represents a tetravalent element, ? satisfies 0.005???1.0, 1?? satisfies 0.05?1???0.9, and 1?? is an area ratio between the regions containing rich N3? anions and the matrix of remaining oxide perovskite material.

Abstract: A crystalline perovskite crystalline composite paraelectric material includes nano-regions containing rich N3? anions dispersed in a nano-grain sized matrix of crystalline oxide perovskite material, wherein (ABO3??)?-(ABO3????N?)1??. A represents a divalent element, B represents a tetravalent element, ? satisfies 0.005???1.0, 1?? satisfies 0.05?1???0.9, and 1?? is an area ratio between the regions containing rich N3? anions and the matrix of remaining oxide perovskite material.

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: A crystalline perovskite crystalline composite paraelectric material includes nano-regions containing rich N3? anions dispersed in a nano-grain sized matrix of crystalline oxide perovskite material, wherein (ABO3-?)?-(ABO3-?-?N?)1-?. A represents a divalent element, B represents a tetravalent element, ? satisfies 0.005???1.0, 1-? satisfies 0.05?1-??0.9, and 1-? is an area ratio between the regions containing rich N3? anions and the matrix of remaining oxide perovskite material.

Abstract: A crystalline perovskite crystalline composite paraelectric material includes nano-regions containing rich N3? anions dispersed in a nano-grain sized matrix of crystalline oxide perovskite material, wherein (ABO3-?)?-(ABO3-?-?N?)1-?. A represents a divalent element, B represents a tetravalent element, ? satisfies 0.005???1.0, 1-? satisfies 0.05?1-??0.9, and 1-? is an area ratio between the regions containing rich N3? anions and the matrix of remaining oxide perovskite material.

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).

Abstract: In accordance with the teachings described herein, low loss thin film capacitors and methods of manufacturing the same are provided. A low loss thin-film capacitor structure may include first and second electrodes and a polar dielectric between the first and second electrodes. The polar dielectric and the first and second electrodes collectively form a capacitor having an operational frequency band. The capacitor structure may also include one or more layers that affect the acoustic properties of the thin-film capacitor structure such that the capacitor absorbs RF energy at a frequency that is outside of the operational frequency band. A method of manufacturing a low loss thin-film capacitor may include the steps of fabricating a capacitor structure that includes a polar dielectric material, and modifying the acoustic properties of the capacitor structure such that the polar capacitor absorbs RF energy at a frequency that is outside of the operating frequency band of the capacitor structure.

Abstract: In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).