Patents by Inventor Iwao Akiyama

Iwao Akiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7284025
    Abstract: A DDS pulse generator has an accumulator that accumulates a phase increment value to produce phase accumulator values, and has a lookup table that contains a digital representation of a pulse waveform such that a pulse output signal is produced from the lookup table in response to the phase accumulator values. To change a period of the pulse output signal without changing edge positions a programmable modulo value is used. An address mapper is situated between the accumulator and address lines of the lookup table to map the rising and falling edge portions of the phase accumulator values into large regions of the lookup table, while phase accumulator values corresponding to high and low logic levels are mapped into small regions of the lookup table. The resulting pulse output signal has easily independently controlled period and pulse width as well as rising and falling edge speeds.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: October 16, 2007
    Assignee: Tektronix, Inc.
    Inventors: Steven K. Sullivan, Raymond L. Veith, Iwao Akiyama, Yasumasa Fujisawa
  • Patent number: 7281025
    Abstract: A triggered DDS generator architecture accumulates a phase increment value in response to a DDS clock to generate phase accumulator values for addressing a waveform lookup table which contains a desired output signal. A time measurement circuit determines a time interval between the arrival of a trigger signal and a subsequent cycle of the DDS clock, which time interval is used to either adjust an initial phase accumulator value or delay the DDS clock so that a constant time is maintained between the arrival of the trigger signal and the desired output signal.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: October 9, 2007
    Assignee: Tektronix, Inc.
    Inventors: Steven K. Sullivan, Raymond L. Veith, Iwao Akiyama, Yasumasa Fujisawa, Yukio Aizawa
  • Publication number: 20050134330
    Abstract: A DDS pulse generator has an accumulator that accumulates a phase increment value to produce phase accumulator values, and has a lookup table that contains a digital representation of a pulse waveform such that a pulse output signal is produced from the lookup table in response to the phase accumulator values. To change a period of the pulse output signal without changing edge positions a programmable modulo value is used. An address mapper is situated between the accumulator and address lines of the lookup table to map the rising and falling edge portions of the phase accumulator values into large regions of the lookup table, while phase accumulator values corresponding to high and low logic levels are mapped into small regions of the lookup table. The resulting pulse output signal has easily independently controlled period and pulse width as well as rising and falling edge speeds.
    Type: Application
    Filed: December 18, 2003
    Publication date: June 23, 2005
    Inventors: Steven Sullivan, Raymond Veith, Iwao Akiyama, Yasumasa Fujisawa
  • Publication number: 20050138094
    Abstract: A triggered DDS generator architecture accumulates a phase increment value in response to a DDS clock to generate phase accumulator values for addressing a waveform lookup table which contains a desired output signal. A time measurement circuit determines a time interval between the arrival of a trigger signal and a subsequent cycle of the DDS clock, which time interval is used to either adjust an initial phase accumulator value or delay the DDS clock so that a constant time is maintained between the arrival of the trigger signal and the desired output signal.
    Type: Application
    Filed: December 18, 2003
    Publication date: June 23, 2005
    Inventors: Steven Sullivan, Raymond Veith, Iwao Akiyama, Yasumasa Fujisawa
  • Patent number: 5424667
    Abstract: A DDS type variable frequency signal generator generates a jitter free and stable output signal regardless of the address interval. If the total number of addressable memory locations of a memory storing digital data is divisible without remainder by an initial address interval, then the memory is read every initial address interval with a clock signal of a predetermined frequency. If the total number of addressable memory locations is not divisible without remainder by the initial address interval, then the address interval is modified to a value that is divisible without remainder into the total number of addressable memory locations and the clock frequency is modified in accordance with this modification of the address interval. The memory is read every modified address interval with the modified clock signal.
    Type: Grant
    Filed: October 15, 1992
    Date of Patent: June 13, 1995
    Assignee: Sony/Tektronix Corporation
    Inventors: Ryoichi Sakai, Iwao Akiyama, Yasumasa Fujisawa
  • Patent number: 4403941
    Abstract: A combustion process for reducing nitrogen oxides in combustors is proposed wherein combustion takes place successively forming an incomplete combustion zone, a reducing combustion zone, and a complete combustion zone, respectively corresponding to primary burners, secondary burners and air ports or after-burners, successively arranged in the direction of gas stream in a furnace. According to the present invention, it is possible to reduce nitrogen oxides by improving a manner of combustion without providing any denitrating apparatuses for exhaust gas.
    Type: Grant
    Filed: August 5, 1980
    Date of Patent: September 13, 1983
    Assignee: Babcock-Hitachi, Ltd.
    Inventors: Kunio Okiura, Iwao Akiyama, Hiroshi Terada, Yoshijiro Arikawa, Akira Baba, Shigeki Morita