Abstract: In a driving force transfer apparatus for a part-time four-wheel driving vechicle, a dog clutch structure is provided at both sides of first and second output axles, the first output axle being connected toward driven road wheels such as rear road wheels and the second output axle being connected toward non-driven road wheels such as front wheels. The dog clutch structure serves to connect the first output axle to the second output axle so that the four road wheels are forced into a four-wheel drive state during a low-speed gear range position switched through a sub transmission mechanism lever. In a first embodiment, a play in each tooth space structure constituting the dog clutch structure is provided so as to make a smooth mesh of the clutch structure, thus an operating force applied to a lever of the sub transmission mechanism can be lowered.

Abstract: A power transfer system which distributes a power of the engine to front and rear wheels in a vehicle. The power transfer system comprises a first input shaft whose one end portion is in butt connection with an input shaft from an engine and whose other end portion is supported to a ball bearing fixed to a housing. A friction clutch is installed to the first input shaft such that the power to the first output shaft is transferred to a second output shaft through an endless chain according to the engagement of the friction clutch. A ring groove is formed at an outer peripheral portion of the first output shaft, and a ring member is installed to the ring groove so as to be in contact with a side surface of the ball bearing. Therefore, a thrust load applied to the first output shaft due to the operation of the friction clutch is securely received by the ball bearing through the ring member.

Abstract: A high speed electronic circuit has a cascode circuit configuration and is provided with a bias current source (CS.sub.0) between an emitter and a base of a load transistor (Q) in the cascode circuit configuration for compensating a base-emitter voltage (V.sub.BE) of the transistor to eliminate an adverse effect of charging and discharging at a stray capacitor (C) which can be connected between the base and the emitter of the transistor. The high speed electronic circuit can be applied to an; circuit, a level shift circuit, a level shift discrimination circuit, a signal distribution circuit, a signal synthesization circuit and a frequency band control circuit.

Abstract: A filter circuit and a filter integrated circuit capable of being used in a high frequency band includes a first resistor R.sub.1 connected between an input signal source and an emitter of a common-base transistor TR.sub.1, a first capacitor C.sub.1 connected between said input signal source and a reference voltage point, a second capacitor C.sub.2 connected between said input signal source and a collector of the common-base transistor TR.sub.1, and a second resistor R.sub.2 connected between the collector of the common-base transistor and the reference voltage point. Thus, a low-pass filter which operates in a high frequency band and suppresses the influence of characteristic parameters over the filter characteristic can be constructed.

Abstract: A filter circuit and a filter integrated circuit capable of being used in a high frequency band comprises a first resistor R.sub.1 connected between an input signal source and an emitter of a common-base transistor TR.sub.1, a first capacitor C.sub.1 connected between said input signal source and a reference voltage point, a second capacitor C.sub.2 connected between said input signal source and a collector of the common-base transistor TR.sub.1, and a second resistor R.sub.2 connected between the collector of the common-base transistor and the reference voltage point. Thus, a low-pass filter which operates in a high frequency band and suppresses the influence of characteristic parameters over the filter characteristic can be constructed.

Abstract: An electronic circuit package which includes first and second conductive metal members and a circuit board held between the first and second metal members and having a cutout in which an electronic circuit part is accommodated and a process of producing such electronic circuit package are disclosed. With the electronic circuit package, deterioration of a high speed characteristic of an electronic circuit part accommodated in the package is minimized, and accordingly, when the electronic circuit package is applied to an IC for very high speed optical communications for use with an optical repeater or the like, a very high speed system can be realized. By assembling the components in accordance with a predetermined order, facility in process of production and improvement in reliability of products are attained.

Abstract: An electronic circuit package which includes first and second conductive metal members and a circuit board held between the first and second metal members and having a cutout in which an electronic circuit part is accommodated and a process of producing such electronic circuit package are disclosed. With the electronic circuit package, deterioration of a high speed characteristic of an electronic circuit part accommodated in the package is minimized, and accordingly, when the electronic circuit package is applied to an IC for very high speed optical communications for use with an optical repeater or the like, a very high speed system can be realized. By assembling the components in accordance with a predetermined order, facility in process of production and improvement in reliability of products are attained.

Abstract: Disclosed is an equalizing and amplifying circuit in an optical signal receiving apparatus comprising a preamplifier circuit having an input terminal connected to the output of a light receiving element. The preamplifier circuit amplifies the electrical signal from the light receiving element and outputs an amplified signal. An automatic gain control circuit is connected to the output of the preamplifier circuit. The preamplifier circuit comprises a transistor having a common-base, a current source connected to the emitter of the transistor for supplying a bias current to the transistor, and a load resistor connected to the collector of the transistor. The emitter of the transistor is connected to the input terminal, and the collector of the transistor is connected to the output terminal. A negative influence caused by mounting the circuit on a package is avoided and the circuit operates stably in a high frequency range.

Abstract: A Mach-Zehnder interferometer type modulator, constructed of first and second optical waveguides, first and second electrodes cooperating with the same, and a driving voltage source, wherein a driving voltage source is constructed of first and second driving units which drive independently the first and second electrodes in accordance with a data input and wherein the first and second driving units apply first and second driving voltages, individually determined, to the first and second electrodes.

Abstract: A data delay circuit includes a first transistor, and a second transistor having a base, an emitter and a collector. Input data is applied to the bases of the first and second transistors. A constant-current source is coupled between the emitters of the first and second transistors and a negative power source. A capacitor is connected between the collector of the first transistor and the collector of the second transistor. The data delay circuit further includes a third transistor and a fourth transistor. The emitters of the third and fourth transistors are connected to the collectors of the first and second transistors, respectively. The bases of the third and fourth transistors are provided with control data having a polarity opposite to that of the input data and having an adjusted amplitude level corresponding to a desired delay time to be given the input data. First and second load resistors are respectively coupled to the collectors of the third and fourth transistors through a positive power source.