Patents by Inventor Izzac Khayo

Izzac Khayo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090078456
    Abstract: At least an embodiment of the present technology provides a method of manufacturing a mechanically adapting interconnecting device for multi-substrate packages comprising placing a metal laminate on each side of a polymer composite, forming a channel in the metal laminate; and metallizing the laminate to create a metal connection inside the channel.
    Type: Application
    Filed: September 27, 2008
    Publication date: March 26, 2009
    Inventors: William Macropoulos, Izzac Khayo, Greg Mendolia
  • Patent number: 7151411
    Abstract: An embodiment of the present invention provides an amplifier system, comprising at least one variable impedance matching network, the output of which provides the input to at least one amplifier stage or provides an output of the power amplifier itself, and a bias network associated with the at least one amplifier stage. The amplifier system may further comprise a controller enabling impedance control to the at least one variable impedance matching network and a supply voltage provided to the at least one variable impedance network and/or the at least one amplifier stage and wherein the at least one variable impedance network and the at least one amplifier stage may be a plurality of impedance networks connected to a plurality of amplifier stages. The at least one variable impedance network may include at least one variable capacitor and the at least one variable capacitor may be a voltage tunable dielectric capacitor which may include Parascan® voltage tunable dielectric material.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: December 19, 2006
    Assignee: Paratek Microwave, Inc.
    Inventors: James Martin, Izzac Khayo, Rich Keenan, Valter Karavanic, Greg Mendolia
  • Publication number: 20060267174
    Abstract: An embodiment of the present invention provides an apparatus, comprising a plurality of stacked substrates, wherein the substrates are capable of accepting surface mounted components (SMCs) and wherein the plurality of stacked substrates are separated and connected by the surface mounted components (SMC) or solder balls or both.
    Type: Application
    Filed: February 6, 2006
    Publication date: November 30, 2006
    Inventors: William Macropoulos, Greg Mendolia, Izzac Khayo
  • Publication number: 20060245308
    Abstract: At least an embodiment of the present technology provides a device, comprising at least one passive component, at least one active component and at least two substrates. The substrates may be advantageously stacked to form a 3D structure. The active and passive components may be advantageously placed in between said substrates to create a compact monolithic 3D device. At least one embodiment of the technology comprises at least a passive component disposed in between said substrates in order to manipulate, distort or otherwise transform at least one electrical signal from one substrate to the next. In another embodiment of the technology at least an interconnector device may be disposed upon at least one substrate in order to respond to mechanical distortions of said substrates under thermal and mechanical stresses.
    Type: Application
    Filed: February 24, 2006
    Publication date: November 2, 2006
    Inventors: William Macropoulos, Izzac Khayo, Greg Mendolia
  • Publication number: 20050206457
    Abstract: An embodiment of the present invention provides an amplifier system, comprising at least one variable impedance matching network, the output of which provides the input to at least one amplifier stage or provides an output of the power amplifier itself, and a bias network associated with the at least one amplifier stage. The amplifier system may further comprise a controller enabling impedance control to the at least one variable impedance matching network and a supply voltage provided to the at least one variable impedance network and/or the at least one amplifier stage and wherein the at least one variable impedance network and the at least one amplifier stage may be a plurality of impedance networks connected to a plurality of amplifier stages. The at least one variable impedance network may include at least one variable capacitor and the at least one variable capacitor may be a voltage tunable dielectric capacitor which may include Parascan® voltage tunable dielectric material.
    Type: Application
    Filed: November 3, 2004
    Publication date: September 22, 2005
    Inventors: James Martin, Izzac Khayo, Rich Keenan, Valter Karavanic, Greg Mendolia