Abstract: A system and method of implementing thereof that maps and condenses system control using reachable state control words is described. The system includes a control logic block, a look-up table which stores N-bit reachable state control words derived from an implementation description N-bit control signal, and a logic hardware block. The control logic block accesses the look-up table with a M-bit control word address. The accessed look-up table outputs a N-bit reachable state control word which is used to control the logic hardware block so as to simulate functions as defined by a user input description. A method for implementing the system is performed by synthesizing the user input description to generate an implementation description which describes a control model of the system in terms of a control logic block driving a logic hardware block with a N-bit control signal. The implementation description is analyzed to determine the reachable states of the N-bit control signal.

Abstract: A system for specifying, synthesizing, analyzing, simulating, and generating circuit designs for frame protocols. A GUI allows a user to specify a frame protocol and to edit and browse frame protocols. The GUI also allows the user to analyze an intermediate virtual circuit resulting from the protocol and to check the syntax of the protocol specification. In addition, the GUI allows the user to generate a High-level Description Language (HDL) file for the protocol. After the HDL is generated, the user can, through the GUI, simulate the operation of the HDL. The present invention includes a "SIMPLUG" feature that specifies a standard interface for GUI software 110, allowing the GUI to operate with a variety of simulators. The present invention also "back annotates" the virtual circuit to provide information in the virtual circuit that is used during simulation to indicate information about individual frames in the protocol.