Patents by Inventor J. C. Liu

J. C. Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080217719
    Abstract: The present disclosure provides an image sensor semiconductor device. A semiconductor substrate having a first-type conductivity is provided. A plurality of sensor elements is formed in the semiconductor substrate. An isolation feature is formed between the plurality of sensor elements. An ion implantation process is performed to form a doped region having the first-type conductivity substantially underlying the isolation feature using at least two different implant energy.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 11, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: J. C. Liu, C. H. Cheng, Chien-Hsien Tseng, Alex Hsu, Feng-Jia Shiu, Shou-Gwo Wuu
  • Patent number: 7423306
    Abstract: A pixel comprises a substrate comprising a first well region formed in a top portion of the substrate, having a first conductivity type. A plurality of shallow trench isolation (STI) structures is formed in the first well region of the substrate, defining a pixel region over the substrate. A second well region is formed in a potion of the first well region of the pixel region, having a second conductivity type opposite to the first conductivity type. A top surface region is formed in a top portion of the second well region, having the first conductivity type. A MOS transistor formed on portions the pixel region, having a pair of source/drain regions formed in the first well region, wherein the source/drain regions are formed of the second conductivity type and one thereof electrically connects the first and well doping regions and the first well region is formed with a depth greater than that of the adjacent STI structure.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: September 9, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: J. C. Liu, Tzu-Hsuan Hsu, Chien-Hsien Tseng, Dun-Nian Yaung, Shou-Gwo Wuu
  • Publication number: 20080111169
    Abstract: A pixel comprises a substrate comprising a first well region formed in a top portion of the substrate, having a first conductivity type. A plurality of shallow trench isolation (STI) structures is formed in the first well region of the substrate, defining a pixel region over the substrate. A second well region is formed in a potion of the first well region of the pixel region, having a second conductivity type opposite to the first conductivity type. A top surface region is formed in a top portion of the second well region, having the first conductivity type. A MOS transistor formed on portions the pixel region, having a pair of source/drain regions formed in the first well region, wherein the source/drain regions are formed of the second conductivity type and one thereof electrically connects the first and well doping regions and the first well region is formed with a depth greater than that of the adjacent STI structure.
    Type: Application
    Filed: September 27, 2006
    Publication date: May 15, 2008
    Inventors: J.C. Liu, Tzu-Hsuan Hsu, Chien-Hsien Tseng, Dun-Nian Yaung, Shou-Gwo Wuu