Patents by Inventor J. D. Wilson

J. D. Wilson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5646441
    Abstract: An integrated circuit package which has a plurality of inner surface pads located on a substrate and arranged in an angular pattern about an integrated circuit. The inner surface pads of the package are coupled to the outer surface pads of the integrated circuit with a TAB tape. The TAB tape has a plurality of conductors which each have a first end attached to the outer pads of the integrated circuit and a land portion attached to the inner surface pads of the substrate. The land portions of the tape are also arranged in an angular pattern about the integrated circuit.
    Type: Grant
    Filed: April 18, 1996
    Date of Patent: July 8, 1997
    Assignee: Intel Corporation
    Inventors: Altaf Hasan, J. D. Wilson, Tor Kalleberg
  • Patent number: 5604330
    Abstract: A package for a semiconductor device. The device is packaged using tape-automated bonding (TAB) to bond an integrated circuit chip to a package substrate of any type. The land pads on the substrate are staggered such that they are arranged in two rows with adjacent pads alternating. In this way, the effective overall pitch of the land pads is smaller than that of each row.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: February 18, 1997
    Assignee: Intel Corporation
    Inventors: Altaf Hasan, J. D. Wilson, Siva Natarajan
  • Patent number: 5475565
    Abstract: An electronic package for an integrated circuit. The integrated circuit is mounted to a heat spreader that is attached to a substrate. The heat spreader is thermally conductive and lowers the thermal impedance of the package. The heat spreader may also provide a return current path from the integrated circuit to the substrate. The substrate has internal power and signal lines that are coupled to the integrated circuit. The power and signal lines are connected to surface pads or leads that can be mounted to an external printed circuit board. Mounted to an inner area of the integrated circuit is a decoupling capacitor. The decoupling capacitor is also connected to a lid that is mounted to the substrate. The decoupling capacitor reduces the noise within the integrated circuit and is used to control the impedance of the overall package. The lid contains both power and ground planes that are connected to the capacitor and the power/ground pins of the substrate.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: December 12, 1995
    Assignee: Intel Corporation
    Inventors: Bidyut K. Bhattacharyya, J. D. Wilson