Patents by Inventor J.F. CHUEH

J.F. CHUEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230387233
    Abstract: In a method of manufacturing a semiconductor device, a gate space is formed by removing a sacrificial gate electrode formed over a channel region, a first gate dielectric layer is formed over the channel region in the gate space, a second gate dielectric layer is formed over the first gate dielectric layer, one or more conductive layers is formed on the second gate dielectric layer, the second gate dielectric layer and the one or more conductive layers are recessed, an annealing operation is performed to diffuse an element of the second gate dielectric layer into the first gate dielectric layer, and one or more metal layers are formed in the gate space.
    Type: Application
    Filed: May 24, 2022
    Publication date: November 30, 2023
    Inventors: Yung-Hsiang CHAN, An-Hung TAI, Hui-Chi CHEN, J.F. CHUEH, Yen-Ta LIN, Ming-Chi HUANG, Cheng-Chieh TU, Jian-Hao CHEN, Kuo-Feng YU