Patents by Inventor J. Hill
J. Hill has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12344402Abstract: An angularly adjustable support tool index for aligning a tool relative to a hole of a part includes an index component having an indexing face positioned against the part. A trapped ball and socket joint allows pivotal adjustment of the index component with respect to a support fixture, which is configured to adjust the index component to align with and support the part. A bushing couples the index component to the ball and socket joint, and a retaining lock secures the bushing in place with respect to the support fixture. The retaining lock restricts or prevents movement the ball and socket joint from movement and maintains a set position of the index component when the retaining lock is engaged with a shoulder of the bushing, and allows adjustment of the index component with respect to the support fixture when the retaining lock is selectively translated away from the bushing shoulder.Type: GrantFiled: May 22, 2024Date of Patent: July 1, 2025Assignee: The Boeing CompanyInventor: Chester J. Hill, IV
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Publication number: 20250210511Abstract: An electronic device comprising multilevel bitlines comprising first bitlines and second bitlines. The first bitlines and the second bitlines are positioned at different levels. Pillar contacts are electrically connected to the first bitlines and to the second bitlines. Level 1 contacts are electrically connected to the first bitlines and level 2 contacts are electrically connected to the second bitlines. A liner is between the first bitlines and the level 2 contacts. Each bitline of the first bitlines is electrically connected to a single pillar contact in a subblock adjacent to the level 1 contacts and each bitline of the second bitlines is electrically connected to a single pillar contact adjacent to the level 2 contacts. Methods of forming an electronic device and related systems are also disclosed.Type: ApplicationFiled: February 20, 2025Publication date: June 26, 2025Inventors: Yoshiaki Fukuzumi, Harsh Narendrakumar Jain, Naveen Kaushik, Adam L. Olson, Richard J. Hill, Lars P. Heineck
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Patent number: 12324154Abstract: Microelectronic devices include a stack structure comprising a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A series of pillars extends through the stack structure. At least one isolation structure extends through an upper stack portion of the stack structure. The at least one isolation structure protrudes into pillars of neighboring columns of pillars of the series of pillars. Conductive contacts are in electrical communication with the pillars into which the at least one isolation structure protrudes. Related methods and electronic systems are also disclosed.Type: GrantFiled: October 23, 2023Date of Patent: June 3, 2025Assignee: Lodestar Licensing Group LLCInventors: Matthew J. King, David A. Daycock, Yoshiaki Fukuzumi, Albert Fayrushin, Richard J. Hill, Chandra S. Tiwari, Jun Fujiki
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Publication number: 20250132248Abstract: A microelectronic device comprises a stack structure overlying a source tier. The stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. The microelectronic device comprises a staircase structure within the stack structure and having steps comprising lateral edges of the tiers, support structures vertically extending through the stack structure and within a horizontal area of the staircase structure, and conductive contacts vertically extending through the stack structure and horizontally neighboring the support structures within the horizontal area of the staircase structure. Each of the conductive contacts has a horizontally projecting portion in contact with one of the conductive structures of the stack structure at one of the steps of the staircase structure. Related memory devices, electronic systems, and methods of forming the microelectronic devices are also described.Type: ApplicationFiled: December 30, 2024Publication date: April 24, 2025Inventors: David H. Wells, Richard J. Hill, Umberto M. Meotto, Matthew Thorum
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Publication number: 20250121825Abstract: A system for controlling an adaptive cruise control system can include a processor and a memory. The memory can store an override ascertainment module, an intent ascertainment module, and an intent utilization module. The override ascertainment module can include instructions that cause the processor to determine, during an operation of the adaptive cruise control system, that an action, performed by an operator of an ego vehicle, is an override of the adaptive cruise control system. The intent ascertainment module can include instructions that cause the processor to determine, during the override, an intent of the operator to change a setting of a mechanism, of the adaptive cruise control system, to control a motion-related aspect of the ego vehicle, from a current setting to a preferred setting. The intent utilization module can include instructions that cause the processor to cause the adaptive cruise control system to utilize information about the intent.Type: ApplicationFiled: March 22, 2024Publication date: April 17, 2025Applicants: Toyota Motor Engineering & Manufacturing North America, Inc., Toyota Jidosha Kabushiki KaishaInventors: Amr Abdelraouf, Rohit Gupta, Kyungtae Han, Tomohiro Matsuda, Nicholas E. Merkel, Matthew J. Hill, Samanthule Nola, Onur Altintas, John Kenney
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Publication number: 20250117861Abstract: Systems and methods are disclosed with respect to using a distributed ledger, such as a blockchain, for tracking changes for a user. Example methods may include implementing one or more servers, each of the one or more servers maintaining a copy of a distributed ledger; detecting a change in a policy or claim status for a user; responding to the detection of the change, including: (i) generating, via a server of the one or more servers, a transaction record for the distributed ledger including data corresponding to the change; (ii) generating a hash value representative of at least the transaction record using at least a generated nonce value; and (iii) storing the transaction record and the hash value to each copy of the distributed ledger at the one or more servers; and performing a function based upon the transaction record stored to the distributed ledger.Type: ApplicationFiled: December 16, 2024Publication date: April 10, 2025Inventors: Ronny S. Bryant, Stacie A. McCullough, Mitchell J. Hill, Jacob J. Alt, Jaime Skaggs, Shawn M. Call, Eric Bellas, Vicki King, Melinda Teresa Magerkurth
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Publication number: 20250107204Abstract: Microelectronic devices include a tiered stack having vertically alternating insulative and conductive structures. A first series of stadiums is defined in the tiered stack within a first block of a dual-block structure. A second series of stadiums is defined in the tiered stack within a second block of the dual-block structure. The first and second series of stadiums are substantially symmetrically structured about a trench at a center of the dual-block structure. The trench extends a width of the first and second series of stadiums. The stadiums of the first and second series of stadiums have opposing staircase structures comprising steps at ends of the conductive structures of the tiered stack. Conductive source/drain contact structures are in the stack and extend substantially vertically from a source/drain region at a floor of the trench. Additional microelectronic devices are also disclosed, as are methods of fabrication and electronic systems.Type: ApplicationFiled: December 9, 2024Publication date: March 27, 2025Inventors: Lifang Xu, Richard J. Hill, Indra V. Chary, Lars P. Heineck
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Patent number: 12237259Abstract: An electronic device comprising multilevel bitlines comprising first bitlines and second bitlines. The first bitlines and the second bitlines are positioned at different levels. Pillar contacts are electrically connected to the first bitlines and to the second bitlines. Level 1 contacts are electrically connected to the first bitlines and level 2 contacts are electrically connected to the second bitlines. A liner is between the first bitlines and the level 2 contacts. Each bitline of the first bitlines is electrically connected to a single pillar contact in a subblock adjacent to the level 1 contacts and each bitline of the second bitlines is electrically connected to a single pillar contact adjacent to the level 2 contacts. Methods of forming an electronic device and related systems are also disclosed.Type: GrantFiled: July 27, 2021Date of Patent: February 25, 2025Assignee: Micron Technology, Inc.Inventors: Yoshiaki Fukuzumi, Harsh Narendrakumar Jain, Naveen Kaushik, Adam L. Olson, Richard J. Hill, Lars P. Heineck
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Publication number: 20250051964Abstract: A high-throughput method for identifying single crystal hexagonal-SiC off-axis surfaces that support surface chemistries and kinetics to selectively produce various epitaxial growth modes of the metastable 3C-SiC polytype is provided. In execution of the aforementioned method, the present invention also encompasses the use of a single crystal hexagonal-SiC domed substrate, and a method for manufacturing thereof. Said method for screening silicon carbide growth surfaces is comprised of: fabrication of a silicon carbide domed substrate; forming a step-terrace growth surface on the domed surface of said silicon carbide domed substrate by hydrogen etching; performing silicon carbide deposition upon said growth surface, thereby creating an silicon carbide epitaxial domed wafer; and characterization of said silicon carbide epitaxial domed wafer. Silicon carbide deposition upon a silicon carbide domed growth surface allows for the modulation of the supersaturation ratio under a single set of growth conditions.Type: ApplicationFiled: October 24, 2024Publication date: February 13, 2025Applicant: Mainstream Engineering CorporationInventors: Jesse A. Johnson, II, Brian P. Tucker, Adam J. Duzik, Justin J. Hill
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Publication number: 20250046711Abstract: A semiconductor device assembly including a substrate; a plurality of functional devices disposed above the substrate; and a memory device disposed above the plurality of functional devices, the memory device including one or more memory arrays, a plurality of first vertical electrical connectors having a first diameter and extending vertically, and a plurality of second vertical electrical connectors having a second diameter and extending vertically, wherein the second diameter is greater than the first diameter.Type: ApplicationFiled: July 24, 2024Publication date: February 6, 2025Inventors: Shyam Surthi, Richard J. Hill
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Publication number: 20250029066Abstract: A system includes a network interface coupled to a network, a profile database coupled to the network interface and configured to store profile information relating to a plurality of users, and a processing circuit. The processing circuit is configured to: provide, via a display of a user device, a graphical user interface having a searchable data field that allows a user to enter search criteria; receive, via the network interface, search criteria from the user device associated with the user of the plurality of users; identify historical data comprising at least one of (a) historical search selections associated with the user or (b) data patterns associated with existing or previous successful relationships; and cause profile information relating to one or more users based on the search criteria and the historical data to be transmitted to the device via the network interface.Type: ApplicationFiled: October 7, 2024Publication date: January 23, 2025Applicant: Wells Fargo Bank, N.A.Inventors: Holly Benedict, Heather Blanchard, Karin Geldfeld, Vincent J. Hill,, SR., Ryan McMahon, Eric Vanderleek
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Patent number: 12191249Abstract: A microelectronic device comprises a stack structure overlying a source tier. The stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. The microelectronic device comprises a staircase structure within the stack structure and having steps comprising lateral edges of the tiers, support structures vertically extending through the stack structure and within a horizontal area of the staircase structure, and conductive contacts vertically extending through the stack structure and horizontally neighboring the support structures within the horizontal area of the staircase structure. Each of the conductive contacts has a horizontally projecting portion in contact with one of the conductive structures of the stack structure at one of the steps of the staircase structure. Related memory devices, electronic systems, and methods of forming the microelectronic devices are also described.Type: GrantFiled: September 3, 2021Date of Patent: January 7, 2025Assignee: Micron Technology, Inc.Inventors: David H. Wells, Richard J. Hill, Umberto M. Meotto, Matthew Thorum
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Patent number: 12190389Abstract: Systems and methods are disclosed with respect to using a distributed ledger, such as a blockchain, for tracking changes for a user. Example methods may include implementing one or more servers, each of the one or more servers maintaining a copy of a distributed ledger; detecting a change in a policy or claim status for a user; responding to the detection of the change, including: (i) generating, via a server of the one or more servers, a transaction record for the distributed ledger including data corresponding to the change; (ii) generating a hash value representative of at least the transaction record using at least a generated nonce value; and (iii) storing the transaction record and the hash value to each copy of the distributed ledger at the one or more servers; and performing a function based upon the transaction record stored to the distributed ledger.Type: GrantFiled: May 26, 2023Date of Patent: January 7, 2025Assignee: STATE FARM MUTUAL AUTOMOBILE INSURANCE COMPANYInventors: Ronny S. Bryant, Stacie A. McCullough, Mitchell J. Hill, Jacob J. Alt, Jaime Skaggs, Shawn M. Call, Eric Bellas, Vicki King, Melinda Teresa Magerkurth
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Patent number: 12184320Abstract: Automated radio frequency safety and compliance for 5G network systems. In an embodiment, a database comprises, for each of a plurality of sites, data representing relative locations of transmitter(s), including at least one 5G antenna, that emit radio frequency (RF) radiation at the site. For at least one of the sites, a power density caused by the transmitter(s) is calculated for one or more areas of the site. In addition, a maximum permissible exposure (MPE) map of the site is generated. The MPE map may comprise a graphical representation of each transmitter, and graphically distinguish any area of the site for which the calculated power density exceeds at least one limit.Type: GrantFiled: April 15, 2020Date of Patent: December 31, 2024Assignee: SAFE DYNAMICS, INC.Inventors: Daniel Jaurigue, Milos Spisak, Bharat Shah, Serdar Ergun, Daniel J. Hill, Douglas M. Williams
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Patent number: 12173428Abstract: A high-throughput method for identifying single crystal hexagonal-SiC off-axis surfaces that support surface chemistries and kinetics to selectively produce various epitaxial growth modes of the metastable 3C-SiC polytype is provided. In execution of the aforementioned method, the present invention also encompasses the use of a single crystal hexagonal-SiC domed substrate, and a method for manufacturing thereof. Said method for screening silicon carbide growth surfaces is comprised of: fabrication of a silicon carbide domed substrate; forming a step-terrace growth surface on the domed surface of said silicon carbide domed substrate by hydrogen etching; performing silicon carbide deposition upon said growth surface, thereby creating an silicon carbide epitaxial domed wafer; and characterization of said silicon carbide epitaxial domed wafer. Silicon carbide deposition upon a silicon carbide domed growth surface allows for the modulation of the supersaturation ratio under a single set of growth conditions.Type: GrantFiled: October 7, 2022Date of Patent: December 24, 2024Assignee: Mainstream Engineering CorporationInventors: Jesse A. Johnson, II, Brian P. Tucker, Adam J. Duzik, Justin J. Hill
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Patent number: 12166094Abstract: Microelectronic devices include a tiered stack having vertically alternating insulative and conductive structures. A first series of stadiums is defined in the tiered stack within a first block of a dual-block structure. A second series of stadiums is defined in the tiered stack within a second block of the dual-block structure. The first and second series of stadiums are substantially symmetrically structured about a trench at a center of the dual-block structure. The trench extends a width of the first and second series of stadiums. The stadiums of the first and second series of stadiums have opposing staircase structures comprising steps at ends of the conductive structures of the tiered stack. Conductive source/drain contact structures are in the stack and extend substantially vertically from a source/drain region at a floor of the trench. Additional microelectronic devices are also disclosed, as are methods of fabrication and electronic systems.Type: GrantFiled: July 12, 2021Date of Patent: December 10, 2024Assignee: Micron Technology, Inc.Inventors: Lifang Xu, Richard J. Hill, Indra V. Chary, Lars P. Heineck
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Publication number: 20240395326Abstract: Memory array structures might include a data line, a common source, and a plurality of sub-blocks of memory cells selectively connected to the data line and to the common source. Sub-blocks of memory cells might include memory cells formed to be around channel material structures, and might include isolation of source-side select lines of adjacent sub-blocks of memory cells. Methods are included for forming such memory array structures.Type: ApplicationFiled: May 1, 2024Publication date: November 28, 2024Applicant: MICRON TECHNOLOGY, INC.Inventors: Paolo Tessariol, Richard J. Hill, Aaron S. Yip, Kunal Parekh
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Patent number: 12150303Abstract: Some embodiments include a memory array having a vertical stack of alternating insulative levels and wordline levels. The wordline levels have conductive terminal ends within control gate regions. The control gate regions are vertically spaced from one another by first insulative regions which include first insulative material. Charge-storage material is laterally outward of the conductive terminal ends, and is configured as segments. The segments of the charge-storage material are arranged one atop another and are vertically spaced from one another by second insulative regions which include second insulative material. The second insulative material has a different dielectric constant than the first insulative material. Charge-tunneling material extends vertically along the stack, and is adjacent to the segments of the charge-trapping material. Channel material extends vertically along the stack, and is adjacent to the charge-tunneling material.Type: GrantFiled: April 24, 2023Date of Patent: November 19, 2024Inventors: Byeung Chul Kim, Francois H. Fabreguette, Richard J. Hill, Purnima Narayanan, Shyam Surthi
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Patent number: 12136067Abstract: A system includes a network interface coupled to a network, a profile database coupled to the network interface and configured to store profile information relating to a plurality of users, and at least one processing circuit. The at least one processing circuit is configured to: receive, via the network interface, search criteria from a first device associated with a first user; cause profile information relating to one or more other users based on the search criteria to be transmitted to the first device via the network interface; receive, via the network interface, an indication of a selection of a user of the one or more other users from the first device; monitor and analyze communications between a second device associated with the selected user and the first device; and transmit a message to at least one of the first device or the second device regarding the analyzed communications.Type: GrantFiled: June 13, 2023Date of Patent: November 5, 2024Assignee: Wells Fargo Bank, N.A.Inventors: Holly Benedict, Heather Blanchard, Karin Geldfeld, Vincent J. Hill, Sr., Ryan McMahon, Eric Vanderleek
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Patent number: 12114403Abstract: The present invention is an apparatus for curing composites out-of-autoclave and out-of-oven. The apparatus is a multilayered composite tool for shaping and curing composites. It also contains a sealant layer and composite resistive heating element on the tool's surface. This heating element provides heat to the composites during cure while binding it to the other layers, eliminating the need for external heat from autoclave and oven sources. A ceramic layer is applied to the top surface of the resistive heater for electrical insulation, heater protection and to provide a smooth surface for finish for the composite components being processed with the invention. A method for using the invention is also described. Finally, one embodiment of the invention is presented where a negative composite tool is created to apply additional pressure to the composite component during curing. This additional pressure enables the current invention to more closely mimic autoclave composite processing.Type: GrantFiled: December 14, 2023Date of Patent: October 8, 2024Assignee: Mainstream Engineering CorporationInventors: Anna P. Skinner, Kayla S. O'Neill, Rachna C. Igwe, Philip Cox, Justin J. Hill