Patents by Inventor J. Keith Hodgson
J. Keith Hodgson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11193961Abstract: Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc.Type: GrantFiled: May 4, 2020Date of Patent: December 7, 2021Assignee: Intel CorporationInventors: Gerhard Schrom, J. Keith Hodgson, Alexander Lyakhov, Chiu Keung Tang, Narayanan Raghuraman, Narayanan Natarajan
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Publication number: 20200264214Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: ApplicationFiled: May 4, 2020Publication date: August 20, 2020Applicant: Intel CorporationInventors: Gerhard SCHROM, J. Keith HODGSON, Alexander LYAKHOV, Chiu Keung TANG, Narayanan RAGHURAMAN, Narayanan NATARAJAN
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Patent number: 10641799Abstract: Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), and compensator for a voltage regulator (VR), are provided. In one example, an apparatus includes: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: GrantFiled: January 22, 2019Date of Patent: May 5, 2020Assignee: Intel CorporationInventors: Gerhard Schrom, J. Keith Hodgson, Alexander Lyakhov, Chiu Keung Tang, Narayanan Raghuraman, Narayanan Natarajan
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Publication number: 20190154739Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: ApplicationFiled: January 22, 2019Publication date: May 23, 2019Applicant: Intel CorporationInventors: Gerhard SCHROM, J. Keith HODGSON, Alexander LYAKHOV, Chiu Keung TANG, Narayanan RAGHURAMAN, Narayanan NATARAJAN
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Patent number: 10184961Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: GrantFiled: September 26, 2016Date of Patent: January 22, 2019Assignee: Intel CorporationInventors: Gerhard Schrom, J. Keith Hodgson, Alexander Lyakhov, Chiu Keung Tang, Narayanan Raghuraman, Narayanan Natarajan
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Patent number: 10033402Abstract: Described is an analog to digital converter (ADC) which comprises: a sigma-delta modulator to receive an analog signal, the sigma-delta modulator operable to perform chopping to cancel common-mode noise; and one or more counters coupled to the sigma-delta modulator to generate a digital code representative of the analog signal.Type: GrantFiled: September 14, 2016Date of Patent: July 24, 2018Assignee: Intel CorporationInventors: Takao Oshita, George L. Geannopoulos, David E. Duarte, J. Keith Hodgson, James S. Ayers, Avner Kornfeld, Jonathan P. Douglas
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Patent number: 9733282Abstract: Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. are provided here. An apparatus is provided which comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: GrantFiled: November 17, 2014Date of Patent: August 15, 2017Assignee: Intel CorporationInventors: Gerhard Schrom, J. Keith Hodgson, Alexander Lyakhov, Chiu Keung Tang, Narayanan Raghuraman, Narayanan Natarajan
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Patent number: 9696350Abstract: Described is an apparatus having a non-linear control to manage power supply droop at an output of a voltage regulator. The apparatus comprises: a first inductor for coupling to a load; a capacitor, coupled to the first inductor, and for coupling to the load; a first high-side switch couple to the first inductor; a first low-side switch coupled to the first inductor; a bridge controller to control when to turn on and off the first high-side and first low-side switches; and a non-linear control (NLC) unit to monitor output voltage on the load, and to cause the bridge controller to turn on the first high-side switch and turn off the first low-side switch when a voltage droop is detected on the load.Type: GrantFiled: May 31, 2013Date of Patent: July 4, 2017Assignee: Intel CorporationInventors: Edward A. Burton, Gerhard Schrom, Michael W. Rogers, Alexander Lyakhov, Ravi Sankar Vunnam, Jonathan P. Douglas, Fabrice Paillet, J. Keith Hodgson, William Dawson Kesling, Chiu Keung Tang, Narayanan Raghuraman, Narayanan Natarajan, Samie Samaan, George Geannopoulos
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Publication number: 20170030947Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: ApplicationFiled: September 26, 2016Publication date: February 2, 2017Inventors: Gerhard SCHROM, J. Keith Hodgson, Alexander Lyakhov, Chiu Keung Tang, Narayanan Raghuraman, Narayanan Natarajan
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Publication number: 20170005670Abstract: Described is an analog to digital converter (ADC) which comprises: a sigma-delta modulator to receive an analog signal, the sigma-delta modulator operable to perform chopping to cancel common-mode noise; and one or more counters coupled to the sigma-delta modulator to generate a digital code representative of the analog signal.Type: ApplicationFiled: September 14, 2016Publication date: January 5, 2017Inventors: Takao Oshita, George L. Geannopoulos, David E. Duarte, J. Keith Hodgson, James S. Ayers, Avner Kornfeld, Jonathan P. Douglas
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Patent number: 9520895Abstract: Described is an analog to digital converter (ADC) which comprises: a sigma-delta modulator to receive an analog signal, the sigma-delta modulator operable to perform chopping to cancel common-mode noise; and one or more counters coupled to the sigma-delta modulator to generate a digital code representative of the analog signal.Type: GrantFiled: May 6, 2015Date of Patent: December 13, 2016Assignee: Intel CorporationInventors: Takao Oshita, George L. Geannopoulos, David E. Duarte, J Keith Hodgson, James S. Ayers, Avner Kornfeld, Jonathan P. Douglas
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Publication number: 20160233879Abstract: Described is an analog to digital converter (ADC) which comprises: a sigma-delta modulator to receive an analog signal, the sigma-delta modulator operable to perform chopping to cancel common-mode noise; and one or more counters coupled to the sigma-delta modulator to generate a digital code representative of the analog signal.Type: ApplicationFiled: May 6, 2015Publication date: August 11, 2016Inventors: Takao Oshita, George L. Geannopoulos, David E. Duarte, J. Keith Hodgson, James S. Ayers, Avner Kornfeld, Jonathan P. Douglas
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Patent number: 9065470Abstract: Described is an analog to digital converter (ADC) which comprises: a sigma-delta modulator to receive an analog signal, the sigma-delta modulator operable to perform chopping to cancel common-mode noise; and one or more counters coupled to the sigma-delta modulator to generate a digital code representative of the analog signal.Type: GrantFiled: December 19, 2012Date of Patent: June 23, 2015Assignee: Intel CorporationInventors: Takao Oshita, George L. Geannopoulos, David E. Duarte, J Keith Hodgson, James S. Ayers, Avner Kornfeld, Jonathan P. Douglas
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Patent number: 9046552Abstract: Described is an apparatus to trim on-die passive components. The apparatus comprises: a resistor-capacitor (RC) dominated oscillator independent of first order transistor speed dependency, wherein the RC dominated oscillator including one or more resistors and capacitors with programmable resistance and capacitance, and wherein the RC dominated oscillator to generate an output signal having a frequency depending substantially on values of the programmable resistance and capacitance; and a trim-able resistor or capacitor operable to be trimmed, for compensating process variations, according to a program code associated with the programmable resistance and capacitance of the RC dominated oscillator.Type: GrantFiled: June 27, 2013Date of Patent: June 2, 2015Assignee: Intel CorporationInventors: Fabrice Paillet, Gerhard Schrom, Alexander Lyakhov, George L. Geannopoulos, Ravi Sankar Vunnam, J. Keith Hodgson
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Patent number: 9048851Abstract: Described is an apparatus for providing spread-spectrum to a clock signal. The apparatus comprises: an oscillator to generate an output clock signal, the oscillator to receive an adjustable reference signal to adjust frequency of the output clock signal; a first circuit to provide a first signal indicative of a center frequency of the output clock signal; a second circuit to generate a switching waveform to provide spread-spectrum for the output clock signal; and a third circuit, coupled to the first and second circuits, to provide the adjustable reference signal according to the first signal and the switching waveform.Type: GrantFiled: May 31, 2013Date of Patent: June 2, 2015Assignee: Intel CorporationInventors: Gerhard Schrom, Alexander Lyakhov, Michael W. Rogers, Dawson W. Kesling, Jonathan P. Douglas, J. Keith Hodgson
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Publication number: 20150069995Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: ApplicationFiled: November 17, 2014Publication date: March 12, 2015Inventors: Gerhard SCHROM, J. Keith HODGSON, Alexander LYAKHOV, Chiu Keung TANG, Narayanan RAGHURAMAN, Narayanan NATARAJAN
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Patent number: 8890737Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, an apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: GrantFiled: June 28, 2013Date of Patent: November 18, 2014Assignee: Intel CorporationInventors: Gerhard Schrom, J. Keith Hodgson, Alexander Lyakhov, Chiu Keung Tang, Narayanan Raghuraman, Narayanan Natarajan
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Publication number: 20140266119Abstract: Described is an apparatus having a non-linear control to manage power supply droop at an output of a voltage regulator. The apparatus comprises: a first inductor for coupling to a load; a capacitor, coupled to the first inductor, and for coupling to the load; a first high-side switch couple to the first inductor; a first low-side switch coupled to the first inductor; a bridge controller to control when to turn on and off the first high-side and first low-side switches; and a non-linear control (NLC) unit to monitor output voltage on the load, and to cause the bridge controller to turn on the first high-side switch and turn off the first low-side switch when a voltage droop is detected on the load.Type: ApplicationFiled: May 31, 2013Publication date: September 18, 2014Inventors: Edward A. BURTON, Gerhard SCHROM, Michael W. ROGERS, Alexander LYAKHOV, Ravi Sankar VUNNAM, Jonathan P. DOUGLAS, Fabrice PAILLET, J. Keith HODGSON
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Publication number: 20140266832Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.Type: ApplicationFiled: June 28, 2013Publication date: September 18, 2014Inventors: Gerhard SCHROM, J. Keith HODGSON, Alexander LYAKHOV, Chiu Keung TANG, Narayanan RAGHURAMAN, Narayanan NATARAJAN
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Publication number: 20140266486Abstract: Described is an apparatus to trim on-die passive components. The apparatus comprises: a resistor-capacitor (RC) dominated oscillator independent of first order transistor speed dependency, wherein the RC dominated oscillator including one or more resistors and capacitors with programmable resistance and capacitance, and wherein the RC dominated oscillator to generate an output signal having a frequency depending substantially on values of the programmable resistance and capacitance; and a trim-able resistor or capacitor operable to be trimmed, for compensating process variations, according to a program code associated with the programmable resistance and capacitance of the RC dominated oscillator.Type: ApplicationFiled: June 27, 2013Publication date: September 18, 2014Inventors: Fabrice PAILLET, Gerhard SCHROM, Alexander LYAKHOV, George L. GEANNOPOULOS, Ravi Sankar VUNNAM, J. Keith HODGSON