Abstract: The invention relates to a multi-beam deflector array device for use in a particle-beam exposure apparatus employing a beam of charged particles, the multi-beam deflector array device having a plate-like shape with a membrane region, the membrane region including a first side facing towards the incoming beam of particles, an array of apertures, each aperture allowing passage of a corresponding beamlet formed out of the beam of particles, a plurality of depressions, each depression being associated with at least one aperture, and an array of electrodes, each aperture being associated with at least one electrode and each electrode being located in a depression, the electrodes being configured to realize a non-deflecting state, wherein the particles that pass through the apertures are allowed to travel along a desired path, and a deflecting state, wherein the particles are deflected off the desired path.

Abstract: Based upon an existing or to be produced multi-layered semiconductor-insulator-semiconductor carrier layer wafer (SOI substrate), irregularity of the etching conditions between the center and the edge region occurring during dry etching can be counteracted by a number of alternative steps, in particular, an additional layer construction compensating for the etching irregularity so that in any event an approximately homogeneous etching removal takes place over the entire area of the wafer to be etched.

Abstract: In order to increase the rigidity of a membrane mask that can be used for ion projection lithography, a second wafer made of the material of the membrane layer is provided in addition to a first wafer. The second wafer is patterned in the same way as the first wafer to form a second carrying ring and is fitted on the membrane layer in a mirror-inverted manner with respect to the first wafer so that the membrane area is arranged between the first and second carrying rings in a centered manner in the direction perpendicular to the membrane plane.

Abstract: The membrane mask is based on an SOI substrate. In an existing or subsequently produced multilayer semiconductor/insulator/semiconductor-carrier-layer substrate, the inhomogeneous mechanical stresses in the semiconductor layer, which lead to undesirable distortions, are converted at least partly into a homogenous state prior to the structuring of the semiconductor layer. In order to accomplish this, either an additional layer structure is provided on an existing SOI substrate, or a modified layer structure is provided in the fabrication of the SOI substrate, or both.

Abstract: The membrane mask is based on an SOI substrate. In an existing or subsequently produced multilayer semiconductor/insulator/semiconductor-carrier-layer substrate, the inhomogeneous mechanical stresses in the semiconductor layer, which lead to undesirable distortions, are converted at least partly into a homogenous state prior to the structuring of the semiconductor layer. In order to accomplish this, either an additional layer structure is provided on an existing SOI substrate, or a modified layer structure is provided in the fabrication of the SOI substrate, or both.

Abstract: Inventive methods are provided for the production of large-area membrane masks, wherein an inexpedient mechanical excessive strain on the membrane or of the membrane layer/etching stop layer/supporting wafer system or the resulting breaking of the components is avoided, which excessive strain occurs particularly due to the employment of an etching cell or generally due to the thin semiconductor layers. The stripping of the semiconductor support layer is preferably performed in two partial steps that are carried out in a mechanically sealed etching cell or with a protective coating, or that one partial step is performed with an etching cell and one with a protective coating, or that the stripping of the semiconductor support layer is performed in a mechanically sealed etching cell initially with a supporting grid and that the supporting grid is removed only after withdrawal from the etching cell.