Patents by Inventor Jürgen Biela

Jürgen Biela has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9331561
    Abstract: Disclosed is a method for the improvement of the line quality in a system, in which a common feeding (1), via at least one distribution transformer (3), feeds at least two non-linear loads (11) drawing non-sinusoidal currents from the common feeding (1), wherein between the common feeding (1) and the distribution transformer (3) there is at least one primary side transformer line (2) and between the at least one distribution transformer (3) and the loads (11) there is at least one lower voltage secondary side transformer line (22), wherein at least one active filter (24) attached to at least one lower voltage secondary side transformer line (22) is used for the attenuation or elimination of higher order harmonics experienced by the common feeding (1). Furthermore a high power distribution system for use of such a method is disclosed, in particular for the operation of an electrostatic precipitator.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: May 3, 2016
    Assignee: ALSTOM Technology Ltd
    Inventors: Johann Walter Kolar, Thiago Batista Soeiro, Jürgen Biela, Per Ranstad, Jörgen Linner
  • Patent number: 9325300
    Abstract: The disclosure relates to a method for the scheduling and/or the operation of a system of at least two power supplies (11) providing DC pulses to a consumer (5), typically an electrostatic precipitator, wherein the power supplies (11) are energized by a common feeding (1). According to the proposed method one power supply (11) is defined to be the reference power supply, and the initial pulses of each further power supply (11) are shifted by controlled delays (?Pri) with respect to the pulses of the reference power supply so as to fill the gaps between the pulses of the reference power supply by the pulses of the further power supplies (11).
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: April 26, 2016
    Assignee: ALSTOM Technology Ltd
    Inventors: Per Ranstad, Jörgen Linner, Jürgen Biela, Thiago Batista Soeiro
  • Patent number: 8912840
    Abstract: A switching device for switching a current between a first connection and a second connection including a series circuit of at least two JFETs (J1-Jn), with further JFETs (J2-Jn), which are connected in series to a lowest JFET (J1), and wherein a wiring network for stabilizing the gate voltages of the JFETs (J1-Jn) is connected between the second connection and the first termination. One additional circuit is connected between each gate connection (GJ2, GJ3 . . . GjN) of the further JFETs (J2-Jn) and associated cathode connections of diodes (DAV) of the wiring network. During switch-on and in the switched-on state, said additional circuit keeps the potential of the respective gate connection higher than the potential of the associated source connection.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: December 16, 2014
    Assignee: Eth Zurich, Eth Transfer
    Inventors: Daniel Aggeler, Jürgen Biela, Johann Walter Kolar
  • Patent number: 8760214
    Abstract: The invention relates to a switching device for switching a current between a first connection (1) and a second connection (2), comprising a series connection of at least two JFETs (J1-J6), of which a lowest JFET (J1) is connected to the first connection (1), or the lowest JFET (J1) is connected in a cascade circuit to the first connection (1) via a control switch (M), and at least one further JFET (J2-J5), which is connected in series to the lowest JFET (J1), wherein the JFET (J6) farthest away from the lowest JFET (J1) is referred to as the uppermost JFET (J6) and is connected with the drain connection to the second connection (2), and wherein a stabilization circuit (D11-D53) is connected between the gate connections of the JFETs (J1-J6) and the first connection (1) in order to stabilize the gate voltages of the JFETs (J1-J6).
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: June 24, 2014
    Assignee: ETH Zurich
    Inventors: Jürgen Biela, Johann W. Kolar, Daniel Aggeler
  • Patent number: 8723589
    Abstract: A switching device for switching a current between a first terminal (1) and a second terminal (2) comprises a cascode circuit having a series connection of a first semiconductor switch (M) and a second semiconductor switch (J), wherein the two semiconductor switches (M, J) are connected to each other by a common point (13), and the first semiconductor switch (M) is controlled by way of a first control input in accordance with a voltage between the first control input and the first terminal (1), and the second semiconductor switch (J) is controlled by way of a second control input (4) in accordance with a voltage between the second control input (4) and the common point (13). To this end, a control circuit having a specifiable capacitance (C) is connected between the second terminal (2) and at least one of the control input.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: May 13, 2014
    Assignee: ETH Zurich
    Inventors: Jürgen Biela, Johann W. Kolar, Daniel Aggeler
  • Publication number: 20130201727
    Abstract: Disclosed is a method for the improvement of the line quality in a system, in which a common feeding (1), via at least one distribution transformer (3), feeds at least two non-linear loads (11) drawing non-sinusoidal currents from the common feeding (1), wherein between the common feeding (1) and the distribution transformer (3) there is at least one primary side transformer line (2) and between the at least one distribution transformer (3) and the loads (11) there is at least one lower voltage secondary side transformer line (22), wherein at least one active filter (24) attached to at least one lower voltage secondary side transformer line (22) is used for the attenuation or elimination of higher order harmonics experienced by the common feeding (1). Furthermore a high power distribution system for use of such a method is disclosed, in particular for the operation of an electrostatic precipitator.
    Type: Application
    Filed: June 1, 2011
    Publication date: August 8, 2013
    Applicant: ALSTOM TECHNOLOGY LTD
    Inventors: Johann Walter Kolar, Thiago Batista Soeiro, Jürgen Biela, Per Ranstad, Jörgen Linner
  • Publication number: 20130194015
    Abstract: The disclosure relates to a method for the scheduling and/or the operation of a system of at least two power supplies (11) providing DC pulses to a consumer (5), typically an electrostatic precipitator, wherein the power supplies (11) are energised by a common feeding (1). According to the proposed method one power supply (11) is defined to be the reference power supply, and the initial pulses of each further power supply (11) are shifted by controlled delays (?Pri) with respect to the pulses of the reference power supply so as to fill the gaps between the pulses of the reference power supply by the pulses of the further power supplies (11).
    Type: Application
    Filed: June 17, 2011
    Publication date: August 1, 2013
    Applicant: ALSTOM TECHNOLOGY LTD
    Inventors: Per Ranstad, Jögen Linner, Jürgen Biela, Thiago Batista Soeiro
  • Publication number: 20130057332
    Abstract: A switching device for switching a current between a first connection and a second connection including a series circuit of at least two JFETs (J1-Jn), with further JFETs (J2-Jn), which are connected in series to a lowest JFET (J1), and wherein a wiring network for stabilizing the gate voltages of the JFETs (J1-Jn) is connected between the second connection and the first termination. One additional circuit is connected between each gate connection (GJ2, GJ3 . . . GjN) of the further JFETs (J2-Jn) and associated cathode connections of diodes (DAV) of the wiring network. During switch-on and in the switched-on state, said additional circuit keeps the potential of the respective gate connection higher than the potential of the associated source connection.
    Type: Application
    Filed: April 6, 2011
    Publication date: March 7, 2013
    Applicant: ETH ZURICH
    Inventors: Daniel Aggeler, Jürgen Biela, Johann Walter Kolar
  • Publication number: 20120105131
    Abstract: A switching device for switching a current between a first terminal (1) and a second terminal (2) comprises a cascode circuit having a series connection of a first semiconductor switch (M) and a second semiconductor switch (J), wherein the two semiconductor switches (M, J) are connected to each other by a common point (13), and the first semiconductor switch (M) is controlled by way of a first control input in accordance with a voltage between the first control input and the first terminal (1), and the second semiconductor switch (J) is controlled by way of a second control input (4) in accordance with a voltage between the second control input (4) and the common point (13). To this end, a control circuit having a specifiable capacitance (C) is connected between the second terminal (2) and at least one of the control input.
    Type: Application
    Filed: March 22, 2010
    Publication date: May 3, 2012
    Applicant: ETH Zürich
    Inventors: Jürgen Biela, Johann W. Kolar, Daniel Aggeler
  • Publication number: 20110291738
    Abstract: The invention relates to a switching device for switching a current between a first connection (1) and a second connection (2), comprising a series connection of at least two JFETs (J1-J6), of which a lowest JFET (J1) is connected to the first connection (1), or the lowest JFET (J1) is connected in a cascade circuit to the first connection (1) via a control switch (M), and at least one further JFET (J2-J5), which is connected in series to the lowest JFET (J1), wherein the JFET (J6) farthest away from the lowest JFET (J1) is referred to as the uppermost JFET (J6) and is connected with the drain connection to the second connection (2), and wherein a stabilization circuit (D11-D53) is connected between the gate connections of the JFETs (J1-J6) and the first connection (1) in order to stabilize the gate voltages of the JFETs (J1-J6).
    Type: Application
    Filed: February 3, 2010
    Publication date: December 1, 2011
    Applicant: ETH ZURICH
    Inventors: Jürgen Biela, Johann W. Kolar, Daniel Aggeler