Abstract: In one embodiment, a system comprises a source configured to provide data and a source error correction code (ECC) generated according to a source ECC scheme; a circuit comprising an ECC transform unit configured to generate a target ECC from the data, detect an error in the data responsive to the source ECC, and correct the error in the data, wherein the target ECC is generated according to a target ECC scheme different from the source ECC scheme, and wherein the ECC transform unit is configured to continuously protect the data with at least one of the source ECC and the target ECC; and a target coupled to receive the data and the target ECC from the circuit.

Abstract: In one embodiment, an apparatus comprises a plurality of core logic blocks, a plurality of first event blocks, and a second event block. Each of the plurality of core logic blocks is configured to generate one or more indications of one or more events. Each first event block of the plurality of first event blocks is coupled to a respective core logic block of the plurality of core logic blocks to receive the one or more indications from the respective core logic block. Each first event block comprises at least one register configured to record which events have been indicated by the respective core logic block. Coupled to the plurality of first event blocks, the second event block is configured to initiate one or more actions responsive to one or more events detected in one or more of the plurality of first event blocks.