Abstract: A power semiconductor module (34), comprising a substrate (12) which carries a plurality of power semiconductor devices (10), wherein the plurality of power semiconductor devices (10) comprises a first group of power semiconductor devices (10) and a second group of at least one power semiconductor device (10). The first group of power semiconductor devices (10) consists of at least two non-damaged power semiconductor devices (10b, 10c), and the second group of power semiconductor devices (10) consists of at least one damaged power semiconductor device (10a). The at least two non-damaged power semiconductor devices (10b, 10c) are electrically interconnected in a parallel configuration, and the second group of at least one power semiconductor device (10) is electrically separated from the members of the first group of power semiconductor devices (10). The disclosure further relates to an electrical converter and a method for manufacturing a power semiconductor module (34).

Abstract: A power module includes a power semiconductor module having a semiconductor chip arranged on a substrate. A lead frame is arranged in electrical contact with the semiconductor chip. Abase plate includes cooling structures and micro channels that are connected to an inlet port and an outlet port. A bond layer connects the power semiconductor module and the base plate. A mold compound is arranged on the power semiconductor module, the bond layer and the base plate. The bond layer is encapsulated completely by the power semiconductor module, the base plate and the mold compound and the lead frame is arranged at least partially within the mold compound.

Abstract: In at least one embodiment, the power semiconductor device (1) comprises a semiconductor body (2), and a protection layer (3) at the semiconductor body (2), wherein the protection layer (3) comprises a material having a surface energy of at most 0.1 mJ/m2, and the protection layer (3) comprises a geometric structuring (33) having a feature size (F) of at least 0.04 ?m and of at most 0.1 mm, seen in top view of the protection layer (3).

Abstract: An electrical contact arrangement electrically contacts at least two power semiconductor devices, and comprises at least two bond wires and at least three electrical contacts, comprising an alternating current contact, a positive direct current contact, and a negative direct current contact. Each electrical contact comprises a ground potential part; contact part; and insulation part on the ground potential part. The contact part is provided on the insulation part. At least two electrical contacts are separated by a gap between the insulation parts and the gap between the contact parts of the separated electrical contacts. A bond wire connects a first power semiconductor device on a contact part of the positive direct current contact with a contact part of the alternating current contact. A bond wire connects a second power semiconductor device on the contact part of the alternating current contact with a contact part of the negative direct current contact.

Abstract: The invention relates to a power semiconductor module comprising a conductive base, a conductive top, and at least two power semiconductor devices arranged between the conductive base and the conductive top. The semiconductor devices are each configured for a current of at least 1 A and/or for a voltage of at least 50 V. An insulating spacer layer is arranged on the power semiconductor devices and at least partially between the conductive base and the conductive top. At least two vertical connection elements pass from the power semiconductor devices through the spacer layer and conductively connect the conductive top with the power semiconductor devices. The spacer layer and the vertical connection elements are configured for compensating height differences of the power semiconductor devices.

Abstract: A power semiconductor module includes a semiconductor board and a number of semiconductor chips attached to the semiconductor board. Each semiconductor chip has two power electrodes. An adapter board is attached to the semiconductor board above the semiconductor chips. The adapter board includes a terminal area for each semiconductor chip on a side facing away from the semiconductor board. The adapter board, in each terminal area, provides a power terminal for each power electrode of the semiconductor chip associated with the terminal area. Each power terminal is electrically connected via a respective vertical post below the terminal area with a respective semiconductor chip and each of the power terminals has at least two plug connectors. Jumper connectors interconnect the plug connectors for electrically connecting power electrodes of different semiconductor chips.

Abstract: A power semiconductor module includes a substrate with a metallization layer that is structured. A semiconductor chip having a first side bonded to the metallization layer. A metal clip, which is a strip of metal, has a first planar part bonded to a second side of the semiconductor chip opposite to the first side. The metal clip also has a second planar part bonded to the metallization layer. A mold encapsulation at least partially encloses the substrate and the metal clip. The mold encapsulation has a recess approaching towards the first planar part of the metal clip. The semiconductor chip is completely enclosed by the mold encapsulation, the substrate and the metal clip and the first planar part of the metal clip is at least partially exposed by the recess. A sensor is accommodated in the recess.

Abstract: One embodiment provides a method of providing a power semiconductor module with a cooler. A power semiconductor module includes a substrate having a first substrate side for carrying at least one electric circuit and having a second substrate side being located opposite to the first substrate side. The second substrate side is connected to a first baseplate side and the baseplate also includes a second baseplate side being located opposite to its first baseplate side and being adapted for coming in contact with the cooler. The cooler includes a first casing component and a second casing component. The baseplate side is equipped with a cooling area that is surrounded by a connecting area.

Abstract: In one embodiment a power semiconductor module includes a substrate having a first substrate side for carrying an electric circuit and having a second substrate side being located opposite to the first substrate side. The second substrate side has a flat surface and is adapted for coming in contact with a cooler. A cooling area that is surrounded by a connecting area is located at the second substrate side. A first casing component of the cooler is connected to the second substrate side at the connecting area and a second casing component is connected to the first casing component such that a cooling channel for providing the cooling area with cooling fluid is provided between the first casing component and the second casing component. A cooling structure can be welded to the cooling area at the second substrate side.

Abstract: One embodiment provides a method of providing a power semiconductor module with a cooler. A power semiconductor module includes a substrate having a first substrate side for carrying at least one electric circuit and having a second substrate side being located opposite to the first substrate side. The second substrate side is connected to a first baseplate side and the baseplate also includes a second baseplate side being located opposite to its first baseplate side and being adapted for coming in contact with the cooler. The cooler includes a first casing component and a second casing component. The baseplate side is equipped with a cooling area that is surrounded by a connecting area.

Abstract: A power semiconductor module includes a main substrate and power semiconductor chips. Each power semiconductor chip is bonded to the main conductive layer with the first power electrode. A first group of the power semiconductor chips is connected in parallel via the second power electrodes and a second group of the power semiconductor chips is connected in parallel via the second power electrodes. The module also includes a first insulation layer and a first conductive layer overlying the first insulation layer as well as a second insulation layer and a second conductive layer overlying the second insulation layer. The first conductive layer provides a first gate conductor area and a first auxiliary emitter conductor area for the first group. The second conductive layer provides a second gate conductor area and a second auxiliary emitter conductor area for the second group.

Abstract: A method for producing a semiconductor module, involving the steps: providing a carrier plate and a substrate having a bonding layer arranged on a surface of the carrier plate or the substrate, applying adhesive in multiple adhesive areas of the carrier plate or the substrate which are free from the bonding layer, positioning the substrate on the carrier plate such that the substrate and the carrier plate are in contact with the bonding layer and the adhesive, and joining the substrate and the carrier plate across the bonding layer by melting or sintering of the bonding layer.

Abstract: An electric power converter device includes a first power semiconductor module and a frame for a closed cooler. The first power semiconductor module includes a first base plate having a first main side, a second main side opposite the first main side and a lateral side surface extending along a circumferential edge of the first base plate and connecting the first and the second main side. The frame is attached to the second main side of the first base plate. The first base plate has a first step on the second main side along the circumferential edge of the first base plate to form a first recess along the circumferential edge of the first base plate, in which first recess a first portion of the frame is received.

Abstract: A semi-manufactured power semiconductor module includes a substrate for bonding at least one power semiconductor chip; a first leadframe bonded to the substrate and providing power terminals; and a second leadframe bonded to the substrate and providing auxiliary terminals; wherein the first leadframe and/or the second leadframe include an interlocking element adapted for aligning the first leadframe and the second leadframe with respect to each other and/or with respect to a mold for molding an encapsulation around the substrate, the first leadframe and the second leadframe.

Abstract: A power semiconductor module including at least one power semiconductor chip providing a power electronics switch; and a semiconductor wafer, to which the at least one power semiconductor chip is bonded; wherein the semiconductor wafer is doped, such that it includes a field blocking region and an electrically conducting region on the field blocking region, to which electrically conducting region the at least one power semiconductor chip is bonded.

Abstract: A power semiconductor module, including a housing; a power semiconductor chip within the housing; power terminals protruding from the housing and electrically interconnected with power electrodes of the semiconductor chip; and auxiliary terminals protruding from the housing and electrically interconnected with a gate electrode and one of the power electrodes; wherein three auxiliary terminals are arranged in a coaxial auxiliary terminal arrangement, which comprises an inner and two outer auxiliary terminals, which are arranged on opposing sides of the inner auxiliary terminal. The inner auxiliary terminal is electrically interconnected with the gate electrode or one of the power electrodes and the two outer auxiliary terminals are electrically connected with the other one of the gate electrode and the one of the power electrodes.

Abstract: A half-bridge module includes a substrate with a base metallization layer divided into a first DC conducting area, a second DC conducting area and an AC conducting area; at least one first power semiconductor switch chip bonded to the first DC conducting area and electrically interconnected with the AC conducting area; at least one second power semiconductor switch chip bonded to the AC conducting area and electrically interconnected with the second DC conducting area; and a coaxial terminal arrangement including at least one inner DC terminal. The at least first outer DC terminal and the at least one second outer DC terminal protrude from the module and are arranged in a row, such that the at least one inner DC terminal is coaxially arranged between the at least one first outer DC terminal and the at least one second outer DC terminal.

Abstract: A power semiconductor device includes a base plate; a Si chip including a Si substrate, the Si chip attached to the base plate; a first metal preform pressed with a first press pin against the Si chip; a wide bandgap material chip comprising a wide bandgap substrate and a semiconductor switch provided in the wide bandgap substrate, the wide bandgap material chip attached to the base plate; and a second metal preform pressed with a second press pin against the wide bandgap material chip; the Si chip and the wide bandgap material chip are connected in parallel via the base plate and via the first press pin and the second press pin; the first metal preform is adapted for forming a conducting path through the Si chip, when heated by an overcurrent; and the second metal preform is adapted for forming an temporary conducting path through the wide bandgap material chip or an open circuit, when heated by an overcurrent.

Abstract: A method for producing a semiconductor module, involving the steps: providing a carrier plate and a substrate having a bonding layer arranged on a surface of the carrier plate or the substrate, applying adhesive in multiple adhesive areas of the carrier plate or the substrate which are free from the bonding layer, positioning the substrate on the carrier plate such that the substrate and the carrier plate are in contact with the bonding layer and the adhesive, and joining the substrate and the carrier plate across the bonding layer by melting or sintering of the bonding layer.

Abstract: An electronics package includes an electrically conducting support layer; at least one electrically conducting outer layer; at least two power electronics components arranged on different sides of the support layer and electrically interconnected with the support layer and with the at least one outer layer; and isolation material, in which the support layer and the at least two power electronics components are embedded, the support layer and the at least one outer layer are laminated together with the isolation material; and a cooling channel for conducting a cooling fluid through the electronics package, the cooling channel runs between the at least two power electronics components through the support layer.