Patents by Inventor J. Rothe Kinnard

J. Rothe Kinnard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9941704
    Abstract: A number of load units are connected to receive power from a number of power supply units. A potential load bus is connected to have a voltage level representative of both a total potential power requirement of the number of load units and a total potential power supply capability of the number of power supply units. A first control circuit enables operation of the number of load units when the voltage level on the potential load bus indicates that a sufficient supply of power is available. An actual load bus is connected to have a voltage level representative of both an actual total power consumption of the number of load units and an actual total power supply available from of the number of power supply units. A second control circuit signals an impending loss of sufficient power supply based on the monitored voltage level on the actual load bus.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: April 10, 2018
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: J. Rothe Kinnard, Robert Cyphers, Brian Benstead
  • Patent number: 9379579
    Abstract: A dual asymmetric input power supply architecture for use in power systems employing input power source redundancy. The dual asymmetric input power supply operates from a main input of the power supply when acceptable voltage is present on the main input. If the main input fails or is out of tolerance, power can be supplied from an auxiliary input through a transformer isolated switching converter. The dual asymmetric input power supply architecture maintains the high efficiency of a single-input power supply while providing an auxiliary connection for input power source redundancy.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: June 28, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventor: J. Rothe Kinnard
  • Publication number: 20160181816
    Abstract: A number of load units are connected to receive power from a number of power supply units. A potential load bus is connected to have a voltage level representative of both a total potential power requirement of the number of load units and a total potential power supply capability of the number of power supply units. A first control circuit enables operation of the number of load units when the voltage level on the potential load bus indicates that a sufficient supply of power is available. An actual load bus is connected to have a voltage level representative of both an actual total power consumption of the number of load units and an actual total power supply available from of the number of power supply units. A second control circuit signals an impending loss of sufficient power supply based on the monitored voltage level on the actual load bus.
    Type: Application
    Filed: March 1, 2016
    Publication date: June 23, 2016
    Inventors: J. Rothe Kinnard, Robert Cyphers, Brian Benstead
  • Patent number: 9312694
    Abstract: A number of load units are connected to receive power from a number of power supply units. A potential load bus is connected to have a voltage level representative of both a total potential power requirement of the number of load units and a total potential power supply capability of the number of power supply units. A first control circuit enables operation of the number of load units when the voltage level on the potential load bus indicates that a sufficient supply of power is available. An actual load bus is connected to have a voltage level representative of both an actual total power consumption of the number of load units and an actual total power supply available from of the number of power supply units. A second control circuit signals an impending loss of sufficient power supply based on the monitored voltage level on the actual load bus.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: April 12, 2016
    Assignee: Oracle International Corporation
    Inventors: J. Rothe Kinnard, Robert Cyphers, Brian Benstead
  • Publication number: 20150130279
    Abstract: A dual asymmetric input power supply architecture for use in power systems employing input power source redundancy. The dual asymmetric input power supply operates from a main input of the power supply when acceptable voltage is present on the main input. If the main input fails or is out of tolerance, power can be supplied from an auxiliary input through a transformer isolated switching converter. The dual asymmetric input power supply architecture maintains the high efficiency of a single-input power supply while providing an auxiliary connection for input power source redundancy.
    Type: Application
    Filed: January 14, 2015
    Publication date: May 14, 2015
    Inventor: J. Rothe Kinnard
  • Patent number: 8963371
    Abstract: A dual asymmetric input power supply architecture for use in power systems employing input power source redundancy. The dual asymmetric input power supply operates from a main input of the power supply when acceptable voltage is present on the main input. If the main input fails or is out of tolerance, power can be supplied from an auxiliary input through a transformer isolated switching converter. The dual asymmetric input power supply architecture maintains the high efficiency of a single-input power supply while providing an auxiliary connection for input power source redundancy.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: February 24, 2015
    Assignee: Oracle International Corporation
    Inventor: J. Rothe Kinnard
  • Publication number: 20140008979
    Abstract: A number of load units are connected to receive power from a number of power supply units. A potential load bus is connected to have a voltage level representative of both a total potential power requirement of the number of load units and a total potential power supply capability of the number of power supply units. A first control circuit enables operation of the number of load units when the voltage level on the potential load bus indicates that a sufficient supply of power is available. An actual load bus is connected to have a voltage level representative of both an actual total power consumption of the number of load units and an actual total power supply available from of the number of power supply units. A second control circuit signals an impending loss of sufficient power supply based on the monitored voltage level on the actual load bus.
    Type: Application
    Filed: July 3, 2012
    Publication date: January 9, 2014
    Applicant: Oracle International Corporation
    Inventors: J. Rothe Kinnard, Robert Cyphers, Brian Benstead
  • Patent number: 8552586
    Abstract: A system for standby power control in a multiple power supply environment is provided. The system includes a plurality of power supplies. Each power supply has a standby voltage output, and has a standby voltage enable signal input. A signal line connects to each power supply at the respective standby voltage enable signal input. A resistance is connected between the signal line and a system reference. The plurality of power supplies are configured such that the resistance determines a number of power supplies that must be available before the standby voltage outputs are activated by the power supplies.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: October 8, 2013
    Assignee: Oracle International Corporation
    Inventor: J. Rothe Kinnard
  • Publication number: 20130020872
    Abstract: A dual asymmetric input power supply architecture for use in power systems employing input power source redundancy. The dual asymmetric input power supply operates from a main input of the power supply when acceptable voltage is present on the main input. If the main input fails or is out of tolerance, power can be supplied from an auxiliary input through a transformer isolated switching converter. The dual asymmetric input power supply architecture maintains the high efficiency of a single-input power supply while providing an auxiliary connection for input power source redundancy.
    Type: Application
    Filed: July 22, 2011
    Publication date: January 24, 2013
    Applicant: Oracle International Corporation
    Inventor: J. Rothe Kinnard
  • Publication number: 20110261547
    Abstract: A system for standby power control in a multiple power supply environment is provided. The system includes a plurality of power supplies. Each power supply has a standby voltage output, and has a standby voltage enable signal input. A signal line connects to each power supply at the respective standby voltage enable signal input. A resistance is connected between the signal line and a system reference. The plurality of power supplies are configured such that the resistance determines a number of power supplies that must be available before the standby voltage outputs are activated by the power supplies.
    Type: Application
    Filed: April 26, 2010
    Publication date: October 27, 2011
    Applicant: Oracle International Corporation
    Inventor: J. Rothe Kinnard
  • Patent number: 7039817
    Abstract: Apparatus forming a computer system or such-like is disclosed that includes a central processing unit (CPU) and a power supply unit. The CPU provides a digital voltage ID (VID) signal output indicative of the power supply voltage that it desires to receive. The power supply unit has a control input for receiving a digital VID signal from the CPU. The power output from the unit is then provided to the CPU at a voltage level in accordance with the received digital VID signal. A VID offset generator is interposed between the CPU and the power supply unit. This receives the digital VID signal from the CPU, and modifies it by applying a positive or negative offset. The modified digital VID signal is then passed to the power supply unit, which supplies a voltage to the CPU as per the modified VID signal, rather than the VID signal originally output by the CPU.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: May 2, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Andrew S. Burnham, Paul Garnett, J. Rothe Kinnard
  • Patent number: 6829141
    Abstract: There is provided a cooling fan drive circuit for driving a pair of cooling fans. The circuit comprises a first power supply line for providing a power connection to each of the fans from a first power source. The circuit further comprises a second power supply line for providing a power connection to the first fan; and a third power supply line for providing a power connection to the second fan. The second and third power supply lines are arranged, in use, to provide separate connections between the respective fans and a power source other than the first power source.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: December 7, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Paul J. Garnett, J. Rothe Kinnard
  • Publication number: 20040179334
    Abstract: A system and method for providing hot-swap status indication in a computer system having redundant power supplies. In one embodiment a system comprises an electrical subsystem that is powered by a first power supply and second power supply. The system further comprises a hot-swap indicator configured to provide a first user indication to indicate whether the first power supply is hot-swappable depending on whether the first power supply is operating at greater than a predetermined power capacity usage, such as fifty percent. The system may also include a second hot-swap indicator for the second power supply.
    Type: Application
    Filed: March 12, 2003
    Publication date: September 16, 2004
    Applicant: Sun Microsystems, Inc.
    Inventors: J. Rothe Kinnard, Rhod J. Jones
  • Publication number: 20040133813
    Abstract: Apparatus forming a computer system or such-like is disclosed that includes a central processing unit (CPU) and a power supply unit. The CPU provides a digital voltage ID (VID) signal output indicative of the power supply voltage that it desires to receive. The power supply unit has a control input for receiving a digital VID signal from the CPU. The power output from the unit is then provided to the CPU at a voltage level in accordance with the received digital VID signal. A VID offset generator is interposed between the CPU and the power supply unit. This receives the digital VID signal from the CPU, and modifies it by applying a positive or negative offset. The modified digital VID signal is then passed to the power supply unit, which supplies a voltage to the CPU as per the modified VID signal, rather than the VID signal originally output by the CPU.
    Type: Application
    Filed: January 7, 2003
    Publication date: July 8, 2004
    Inventors: Andrew S. Burnham, Paul Garnett, J. Rothe Kinnard
  • Publication number: 20030030977
    Abstract: There is provided a cooling fan drive circuit for driving a pair of cooling fans. The circuit comprises a first power supply line for providing a power connection to each of the fans from a first power source. The circuit further comprises a second power supply line for providing a power connection to the first fan; and a third power supply line for providing a power connection to the second fan. The second and third power supply lines are arranged, in use, to provide separate connections between the respective fans and a power source other than the first power source.
    Type: Application
    Filed: June 14, 2002
    Publication date: February 13, 2003
    Inventors: Paul J. Garnett, J. Rothe Kinnard
  • Patent number: 3949278
    Abstract: A driving circuit for driving a number of solenoid type devices which have very accurate voltage requirements and which utilizes the inductive kick of both the driven devices and internal transformers to efficiently utilize power. A feedback path is provided to an integrated circuit regulator to provide an indication of the power being consumed by the devices. The integrated circuit regulator, along with accompanying circuitry, regulates the voltage output by a power driver such that the voltage output remains steady regardless of the number of solenoid type devices which are being operated. In addition, a feedback path is also provided from each of the driven devices and the internal transformers to the power source such that when the devices are deenergized logically, the inductive kick from each of the devices and the transformers is applied to the power source for power conservation as well as to prevent the necessity for having heat sinks to dissipate the power.
    Type: Grant
    Filed: December 31, 1974
    Date of Patent: April 6, 1976
    Assignee: International Business Machines Corporation
    Inventors: J. Rothe Kinnard, Errol Ray Williams, Jr.