Patents by Inventor J. W. Wang

J. W. Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5912492
    Abstract: A Metal Oxide Semiconductor Field Effect Transistor (MOSFET) exhibiting enhanced immunity to Hot Carrier Effects (HCEs), and a method by which the MOSFET may be formed. To form the MOSFET there is first provided a semiconductor substrate having a gate dielectric layer formed thereupon. The gate dielectric layer has a gate electrode formed thereupon, where the gate dielectric layer extends beyond a pair of opposite edges of the gate electrode. Formed into the semiconductor substrate adjoining the pair of opposite edges of the gate electrode is a pair of low dose ion implants. Formed upon the gate dielectric layer and contacting the pair of opposite edges of the gate electrode is a pair of conductive spacers. The pair of conductive spacers partially overlaps the pair of low dose ion implants. Finally, there is formed into the semiconductor substrate adjoining the pair of opposite edges of the gate electrode and further removed from the pair of conductive spacers a pair of source/drain electrodes.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: June 15, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hsung Chang, J. W. Wang
  • Patent number: 5686329
    Abstract: A Metal Oxide Semiconductor Field Effect Transistor (MOSFET) exhibiting enhanced immunity to Hot Carrier Effects (HCEs), and a method by which the MOSFET may be formed. To form the MOSFET there is first provided a semiconductor substrate having a gate dielectric layer formed thereupon. The gate dielectric layer has a gate electrode formed thereupon, where the gate dielectric layer extends beyond a pair of opposite edges of the gate electrode. Formed into the semiconductor substrate adjoining the pair of opposite edges of the gate electrode is a pair of low dose ion implants. Formed upon the gate dielectric layer and contacting the pair of opposite edges of the gate electrode is a pair of conductive spacers. The pair of conductive spacers partially overlaps the pair of low dose ion implants. Finally, there is formed into the semiconductor substrate adjoining the pair of opposite edges of the gate electrode and further removed from the pair of conductive spacers a pair of source/drain electrodes.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: November 11, 1997
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hsung Chang, J. W. Wang