Abstract: An electronic process is provided for creating a small dimensioned pattern in a semiconductor device. In one embodiment, the pattern functions to electrically separate two areas of the substrate by less than a micron. A lithographic mask which does not have to utilize dimensions as small as those being formed on the semiconductor device is used to form a predetermined pattern with at least one separation region by irradiating and developing a photoresist material. A layer of buffer material below the photoresist material reacts with a reactive ion etch to form a separation area with sloping sides comprised of polymer filaments produced from the reaction. The sloped sides of the separation region provide a separation dimension in the substrate of the semiconductor structure which is significantly smaller than a corresponding dimension required to be implemented on the lithographic mask.