Abstract: A voltage pumping device is disclosed. The device may include a voltage level detector for detecting a level of a voltage fed back thereto and generating a voltage pumping enable signal according to the detected voltage level, an oscillator for operating in response to the voltage pumping enable signal and generating a desired pulse signal in a normal operation mode, a clock supply controller for receiving an external clock signal, operating in response to the voltage pumping enable signal and outputting the external clock signal in a low-power operation mode, and a voltage pump for performing a voltage pumping operation in response to the pulse signal from the oscillator in the normal operation mode and performing the voltage pumping operation in response to the clock signal from the clock supply controller in the low-power operation mode.

Abstract: A voltage pumping device is disclosed. The device may include a voltage level detector for detecting a level of a voltage fed back thereto and generating a voltage pumping enable signal according to the detected voltage level, an oscillator for operating in response to the voltage pumping enable signal and generating a desired pulse signal in a normal operation mode, a clock supply controller for receiving an external clock signal, operating in response to the voltage pumping enable signal and outputting the external clock signal in a low-power operation mode, and a voltage pump for performing a voltage pumping operation in response to the pulse signal from the oscillator in the normal operation mode and performing the voltage pumping operation in response to the clock signal from the clock supply controller in the low-power operation mode.

Abstract: A voltage pumping device is disclosed. The device may include a voltage level detector for detecting a level of a voltage fed back thereto and generating a voltage pumping enable signal according to the detected voltage level, an oscillator for operating in response to the voltage pumping enable signal and generating a desired pulse signal in a normal operation mode, a clock supply controller for receiving an external clock signal, operating in response to the voltage pumping enable signal and outputting the external clock signal in a low-power operation mode, and a voltage pump for performing a voltage pumping operation in response to the pulse signal from the oscillator in the normal operation mode and performing the voltage pumping operation in response to the clock signal from the clock supply controller in the low-power operation mode.

Abstract: A voltage level detection circuit is disclosed. The detection circuit may include a pull-up unit including a plurality of pull-up devices, each for supplying an internal voltage in response to a signal resulting from a logic operation of a voltage up control signal and a voltage down control signal, a voltage division unit including a plurality of voltage dividers, each for dividing the internal voltage from a corresponding one of the pull-up device, a switching unit including a plurality of switching devices, each for switching and supplying an output voltage from a corresponding one of the voltage dividers to an output node in response to a signal resulting from a logic operation of the voltage up control signal and voltage down control signal, and a comparator for comparing the voltage at the output node with a predetermined reference voltage and outputting a voltage pumping enable signal according to a result of the comparison.

Abstract: A voltage controlled oscillator generates a signal having a predetermined cycle corresponding to change of an input power at a self-refresh mode of a DRAM. At the self-refresh mode for performing a refresh operation at every predetermined cycle of the DRAM, a start-up circuit unit provides a constant bias current to an oscillator unit regardless of change of the input power, thereby making the stable operation of the DRAM possible.

Abstract: The present invention provides an internal circuit protection device. The internal circuit protection device detects an abnormal input voltage when the input voltage exceeds a predetermined value, generates an output signal maintaining a high level just in the operating region of a chip by generating a power up signal having an opposite condition to a normal power up signal, and changes the power up signal according to the change of supply voltage by using this output signal, thereby protecting an internal circuit of DRAM chip.

Abstract: The present invention discloses a refresh oscillator including a biasing circuit for generating constant first and second biases by using current mirrors, regardless of variations of a power supply voltage, a start-up circuit for stabilizing the initial operation of the biasing circuit by applying a predetermined level of potential to the biasing circuit, and an oscillator for generating a constant period of refresh signals according to the first and second biases. The refresh oscillator can improve operation reliability by generating a constant period of signals, regardless of variations of the power supply voltage.