Abstract: A reference voltage generator for a ferroelectric materialmemory device alternately stores a reference data stored in one pair of reference cells, and thus enhances a durability of a chip. The reference cell portion is connected between two reference bit lines. It has first and second reference cells to store reference voltages. Precharge portion removes a voltage difference at the first reference cell and a voltage difference at the second reference cell by the process of the precharging operation over the two reference bit lines. Reference bit line equalizer performs a charge division operation over the two reference bit lines. Reference cell data controller is connected between the two reference bit lines for alternately changing data within the first and the second reference cells. Reference cell data control signal generator generates first and second reference cell data control signals to control the operation of the reference cell data controller.

Abstract: The present invention relates to a ferroelectric RAM device to solve the problem that, in case of using one reference voltage generator to bit lines in which a plurality of memory cells are arranged, electric charge is decreased according to the increase in the number of use of reference cell and the reference voltage is changed, resulting in it is difficult to secure the sensing margin.

Abstract: The present invention relates a ferroelectric memory device capable of increasing the life time of the ferroelectric memory devices, by removing a reference ferroelectric capacitors with a smaller chip size. According to the present invention, the ferroelectric memory device uses a power supply Vcc as an reference voltage and doesn't have a reference cell consisting of ferroelectric capacitors. A plate voltage generator according to the present invention provides a plurality of voltage levels to a plate electrode of the ferroelectric capacitor at a read operation in order to use a power supply Vcc as a reference voltage of the sense amplifier, in response to first and second control signals, wherein the plate voltage generating means provides to the plate electrode a first voltage level Vcc+.alpha. more than a power supply Vcc by an additional voltage level .alpha.