Abstract: A circuit is provided that comprises a transformer having a first coil, which is arranged on a substrate, a second coil, which is arranged above the first coil on the substrate, and a dielectric between the first coil and the second coil. The circuit furthermore comprises a resonant circuit, which is couplable to the first coil and/or the second coil to form a resonant loop, wherein a measure of a characteristic frequency of the resonant loop and/or a measure of a power consumption of the resonant loop is able to be tapped off at an output of the resonant circuit. A corresponding method is also provided.

Abstract: A circuit is provided, comprising a transformer having a first coil that is arranged on a substrate and a second coil that is arranged on the substrate above the first coil, and a dielectric between the first coil and the second coil. The circuit furthermore comprises a guard ring around the transformer. The circuit furthermore comprises a diagnostic circuit (55) that is configured so as to ground the guard ring in a normal operating mode and to measure a measurement voltage or a measurement current at a measurement impedance between the guard ring and the ground potential in a diagnostic operating mode.

Abstract: In accordance with an embodiment, a controller to operate a temperature sensor comprising a transistor assembly is configured to: cause a generation of a first pair of bias currents comprising a first bias current and a second bias current for the transistor assembly; determine a first diode voltage difference of the transistor assembly corresponding to the first pair of bias currents; cause a generation of a second pair of bias currents comprising a third bias current and a fourth bias current for the transistor assembly; determine a second diode voltage difference for the transistor assembly corresponding to the second pair of bias currents; and compare the first diode voltage difference and the second diode voltage difference to determine at least one of functional information and performance information of the temperature sensor.

Abstract: An input stage for an analog/digital converter, an analog/digital converter and a method for testing analog/digital converters with successive approximation are disclosed. At an input stage, an input signal is supplied via a first transistor arrangement of a sampling capacitor arrangement. The sampling capacitor arrangement can be optionally connected to ground or to a reference voltage by way of a second transistor arrangement and a switch apparatus.

Abstract: A circuit is provided that comprises a transformer having a first coil, which is arranged on a substrate, a second coil, which is arranged above the first coil on the substrate, and a dielectric between the first coil and the second coil. The circuit furthermore comprises a resonant circuit, which is couplable to the first coil and/or the second coil to form a resonant loop, wherein a measure of a characteristic frequency of the resonant loop and/or a measure of a power consumption of the resonant loop is able to be tapped off at an output of the resonant circuit. A corresponding method is also provided.

Abstract: A circuit is provided, comprising a transformer having a first coil that is arranged on a substrate and a second coil that is arranged on the substrate above the first coil, and a dielectric between the first coil and the second coil. The circuit furthermore comprises a guard ring around the transformer. The circuit furthermore comprises a diagnostic circuit (55) that is configured so as to ground the guard ring in a normal operating mode and to measure a measurement voltage or a measurement current at a measurement impedance between the guard ring and the ground potential in a diagnostic operating mode.

Abstract: A method of operating a relaxation oscillator includes determining a measure of a propagation delay of a detection device of a relaxation oscillator and increasing a charging rate of a capacitor device of the relaxation oscillator for a time duration based on the determined measure of the propagation delay.

Abstract: A method of operating a relaxation oscillator includes determining a measure of a propagation delay of a detection device of a relaxation oscillator and increasing a charging rate of a capacitor device of the relaxation oscillator for a time duration based on the determined measure of the propagation delay.

Abstract: A method includes applying a current to an input pin of an integrated circuit; converting an analog signal at the input pin to a digital stream using a Sigma-Delta modulator; converting the digital stream to a first digital output signal proportional to the analog signal in a first input range between a first analog signal value and a second analog signal value, where the first input range corresponds to a pre-determined range of the analog signal smaller than a full-scale input range of the analog signal; converting the digital stream to a second output signal; comparing the second output signal to a first threshold corresponding to a third analog signal value at the input pin that is outside of the first input range; and providing an indication of an open circuit condition at the input pin when the second output signal crosses the first threshold.

Abstract: A method of monitoring a gate of a transistor includes monitoring a gate voltage of the transistor; measuring a first time difference between when a gate control signal is asserted and when the gate voltage of the transistor crosses a first voltage threshold based on the monitoring; measuring a second time difference between when the gate voltage of the transistor crosses the first voltage threshold and when the gate voltage of the transistor crosses a second voltage threshold based on the monitoring; and determining whether the first time difference falls within a first time window, and whether the second time difference falls within a second time window.

Abstract: Representative implementations of devices and techniques provide a built-in self-test (BIST) for an analog-to-digital converter (ADC). Stimuli needed to test an ADC are generated within the chip containing the ADC. Evaluation circuitry is also available on-chip. Generation and evaluation circuits and systems are based on existing circuits and/or components of the chip.

Abstract: Representative implementations of devices and techniques provide a built-in self-test (BIST) for an analog-to-digital converter (ADC). Stimuli needed to test an ADC are generated within the chip containing the ADC. Evaluation circuitry is also available on-chip. Generation and evaluation circuits and systems are based on existing circuits and/or components of the chip.

Abstract: In some examples, a method includes controlling a first set of switches to deliver a first voltage signal through a first set of capacitors to a common node. The method also includes controlling a second set of switches to deliver a second voltage signal through a second set of capacitors to the common node, wherein the first set of capacitors is electrically connected to the second set of capacitors by the common node. The method further includes measuring a time duration to discharge the common node. The second voltage signal includes an opposing polarity to the first voltage signal.

Abstract: A method for use in testing an analog-to-digital converter. The method includes providing a set of bins, varying a voltage, taking samples of the voltage, providing a selection flag, associating each sample with one bin of the set of bins, and observing a number of samples associated with the bins. An apparatus includes an analog-to-digital converter configured to convert a voltage at an input node to a digital representation provided at an output node. The input node is configured to be coupled to a voltage generator. A sample select unit is configured to determine if a voltage at the input node at least equals a first threshold level and does not exceed a second threshold level. The apparatus is configured, based on the determining, to selectively associate the digital representation with a bin of a set of bins.

Abstract: A method for use in testing an analog-to-digital converter. The method includes providing a set of bins, varying a voltage, taking samples of the voltage, providing a selection flag, associating each sample with one bin of the set of bins, and observing a number of samples associated with the bins. An apparatus includes an analog-to-digital converter configured to convert a voltage at an input node to a digital representation provided at an output node. The input node is configured to be coupled to a voltage generator. A sample select unit is configured to determine if a voltage at the input node at least equals a first threshold level and does not exceed a second threshold level. The apparatus is configured, based on the determining, to selectively associate the digital representation with a bin of a set of bins.

Abstract: A semiconductor chip with a built-in-self-test circuit including a first analog-to-digital converter (ADC) configured to convert an analog input voltage signal received at its input into a digital output voltage signal that characterizes the first ADC; and a second ADC coupled to the input of the first ADC and configured to convert the analog input voltage signal received at its input to a digital feedback voltage signal, wherein the analog input voltage signal is generated based on the digital feedback signal.

Abstract: A semiconductor chip with a built-in-self-test circuit including a first analog-to-digital converter (ADC) configured to convert an analog input voltage signal received at its input into a digital output voltage signal that characterizes the first ADC; and a second ADC coupled to the input of the first ADC and configured to convert the analog input voltage signal received at its input to a digital feedback voltage signal, wherein the analog input voltage signal is generated based on the digital feedback signal.

Abstract: An apparatus and method for the analysis of a periodic signal. One embodiment provides signal values. Signs are assigned to the signal values. The signed signal values are summed to a first sum. At least one signal property is determined on the basis of the first sum.

Abstract: A bandgap reference circuit is proposed. To remove parasitic effects, this includes the combination of a first circuit section (1), which generates a temperature-proportional voltage, and a second circuit section (2), which generates an inversely temperature-proportional voltage. The bandgap reference circuit generates a bandgap reference voltage (Ubg) as the sum of the temperature-proportional voltage of the first circuit section (1) and the inversely temperature-proportional voltage of the second circuit section (2). To remove the parasitic effects, both circuit sections (1, 2) include bipolar transistor circuits with multiple bipolar transistors (Q1-Q4; Q5-Q8), so that both the temperature-proportional voltage and the inversely temperature-proportional voltage are generated in the form of a sum and difference formation of multiple base-emitter voltages of the appropriate bipolar transistors.

Abstract: A bandgap reference circuit is proposed. To remove parasitic effects, this includes the combination of a first circuit section (1), which generates a temperature-proportional voltage, and a second circuit section (2), which generates an inversely temperature-proportional voltage. The bandgap reference circuit generates a bandgap reference voltage (Ubg) as the sum of the temperature-proportional voltage of the first circuit section (1) and the inversely temperature-proportional voltage of the second circuit section (2). To remove the parasitic effects, both circuit sections (1, 2) include bipolar transistor circuits with multiple bipolar transistors (Q1-Q4; Q5-Q8), so that both the temperature-proportional voltage and the inversely temperature-proportional voltage are generated in the form of a sum and difference formation of multiple base-emitter voltages of the appropriate bipolar transistors.