Abstract: The subject matter disclosed herein relates to determining a lithographic set point using simulations of optical proximity correction verification. In one embodiment, a computer-implemented method of determining a lithographic tool set point for a lithographic process is disclosed. The method may include: providing a model of a production lithographic process including simulations of printed shapes; analyzing the model of the production lithographic process to determine whether a set of structures on a production mask used in the production lithographic process to create the printed shapes will fail under a plurality of set points; determining an operating region of set points where the set of structures on the production mask does not fail; and establishing a set point location within the operating region based upon a set point selection function.

Abstract: The present invention provides a method and computer program product for designing an electrically testable pattern that is based on patterns derived from the desired chip layout to be printed. Such electrical test patterns are based on the features within a region of influence around critical sites. The critical sites may be identified, for example, by processing the chip layout through an OPC verification tool that flags potential failure sites. The electrical test pattern is formed from features within an region of influence (ROI) around the critical site, and also include electrical feed lines at terminal ends of one or more features having an electrical characteristic that is sensitive to changes in the printed environment of the critical site. The feed lines may be locate on the same or a different layer than the critical site, depending on the chip design.

Abstract: The subject matter disclosed herein relates to determining a lithographic set point using simulations of optical proximity correction verification. In one embodiment, a computer-implemented method of determining a lithographic tool set point for a lithographic process is disclosed. The method may include: providing a model of a production lithographic process including simulations of printed shapes; analyzing the model of the production lithographic process to determine whether a set of structures on a production mask used in the production lithographic process to create the printed shapes will fail under a plurality of set points; determining an operating region of set points where the set of structures on the production mask does not fail; and establishing a set point location within the operating region based upon a set point selection function.

Abstract: The present invention provides a method and computer program product for designing an electrically testable pattern that is based on patterns derived from the desired chip layout to be printed. Such electrical test patterns are based on the features within a region of influence around critical sites. The critical sites may be identified, for example, by processing the chip layout through an OPC verification tool that flags potential failure sites. The electrical test pattern is formed from features within an region of influence (ROI) around the critical site, and also include electrical feed lines at terminal ends of one or more features having an electrical characteristic that is sensitive to changes in the printed environment of the critical site. The feed lines may be locate on the same or a different layer than the critical site, depending on the chip design.

Abstract: A method is provided for performing optical proximity correction (“OPC”) verification in which features of concern of a photomask are identified using data relating to shapes of the photomask, an aerial image to be obtained using the photomask, or a photoresist image to be obtained in a photoimageable layer using the photomask. A plurality of areas of the photomask, aerial image or photoresist image are identified which incorporate the identified features of concern, where the plurality of identified areas occupy substantially less area than the total area of the photomask that is occupied by features. Enhanced OPC verification limited to the plurality of identified areas is then performed to identify problems of at least one of the photomask, aerial image or photoresist image.

Abstract: A method for implementing an ORC process to facilitate physical verification of an integrated circuit (IC) graphical design. The method includes partitioning the IC graphical design data into files by a host machine such that the files correspond to regions of interest or partitions with defined margins, dispersing the partitioned data files to available cpus within the network, processing of each job by the cpu receiving the file, wherein artifacts arising from bisection of partitioning margins during the partitioning, including cut-induced false errors, are detected and removed, and the shape-altering effects of such artifact errors are minimized and transmitting the results of processing at each cpu to the host machine for aggregate processing.

Abstract: A method is provided for performing optical proximity correction (“OPC”) verification in which features of concern of a photomask are identified using data relating to shapes of the photomask, an aerial image to be obtained using the photomask, or a photoresist image to be obtained in a photoimageable layer using the photomask. A plurality of areas of the photomask, aerial image or photoresist image are identified which incorporate the identified features of concern, where the plurality of identified areas occupy substantially less area than the total area of the photomask that is occupied by features. Enhanced OPC verification limited to the plurality of identified areas is then performed to identify problems of at least one of the photomask, aerial image or photoresist image.

Abstract: A method for implementing an ORC process to facilitate physical verification of an integrated circuit (IC) graphical design. The method includes partitioning the IC graphical design data into files by a host machine such that the files correspond to regions of interest or partitions with defined margins, dispersing the partitioned data files to available cpus within the network, processing of each job by the cpu receiving the file, wherein artifacts arising from bisection of partitioning margins during the partitioning, including cut-induced false errors, are detected and removed, and the shape-altering effects of such artifact errors are minimized and transmitting the results of processing at each cpu to the host machine for aggregate processing.

Abstract: A design verification method, including (a) providing in a design a design electrically conducting line and a design contact region being in direct physical contact with the design electrically conducting line; (b) modeling a simulated electrically conducting line of the design electrically conducting line; (c) simulating a possible contact region of the design contact region, wherein the design contact region and the possible contact region are not identical; and (d) determining that the design electrically conducting line and the design contact region are potentially defective if an interfacing surface area of the simulated electrically conducting line and the possible contact region is less than a pre-specified value.

Abstract: Fill pattern inspection system and method where the fill patterns are inspected to a different criteria than the primary pattern or not inspected at all. The fill pattern images are marked such that they may be identified by easily recognizable shapes or designations to avoid unnecessary inspections and repairs in the fill areas. Alternatively, subresolution markers are placed in an image data for locating fill pattern areas. A software tool is also programmed to automatically detect the subresolution markers during inspection and to inspect the regions on a plate which correspond to the subresolution markers in the image data at a different level of criteria than one which is employed for primary pattern inspection.

Abstract: A method of repairing defects on masks includes the step of providing a coating on the mask to prevent damage to clear regions of the mask from laser ablation splatter, laser ablation caused quartz pitting, laser deposition staining, and FIB caused gallium staining. The coating is a metal, a polymer, or a carbon material. The coating is formed on clear regions of the mask as well as either over or under the light absorbing material of the mask. A coating comprising a thin copper layer significantly improves imaging with the ion beam while protecting clear regions of the mask from FIB stain. A coating formed of a photosensitive polymer is used to etch opaque defects. While wanted opaque regions adjacent an opaque defect are also etched in this etch step, these created clear defects are then repaired in a subsequent FIB deposition step while a copper coating protects adjacent clear regions from FIB stain.

Abstract: A method of repairing defects on masks includes the step of providing a coating on the mask to prevent damage to clear regions of the mask from laser ablation splatter, laser ablation caused quartz pitting, laser deposition staining, and FIB caused gallium staining. The coating is a metal, a polymer, or a carbon material. The coating is formed on clear regions of the mask as well as either over or under the light absorbing material of the mask. A coating comprising a thin copper layer significantly improves imaging with the ion beam while protecting clear regions of the mask from FIB stain. A coating formed of a photosensitive polymer is used to etch opaque defects. While wanted opaque regions adjacent an opaque defect are also etched in this etch step, these created clear defects are then repaired in a subsequent FIB deposition step while a copper coating protects adjacent clear regions from FIB stain.

Abstract: A method of repairing defects on masks includes the step of providing a coating on the mask to prevent damage to clear regions of the mask from laser ablation splatter, laser ablation caused quartz pitting, laser deposition staining, and FIB caused gallium staining. The coating is a metal, a polymer, or a carbon material. The coating is formed on clear regions of the mask as well as either over or under the light absorbing material of the mask. A coating comprising a thin copper layer significantly improves imaging with the ion beam while protecting clear regions of the mask from FIB stain. A coating formed of a photosensitive polymer is used to etch opaque defects. While wanted opaque regions adjacent an opaque defect are also etched in this etch step, these created clear defects are then repaired in a subsequent FIB deposition step while a copper coating protects adjacent clear regions from FIB stain.

Abstract: A method of repairing defects on masks includes the step of providing a coating on the mask to prevent damage to clear regions of the mask from laser ablation splatter, laser ablation caused quartz pitting, laser deposition staining, and FIB caused gallium staining. The coating is a metal, a polymer, or a carbon material. The coating is formed on clear regions of the mask as well as either over or under the light absorbing material of the mask. A coating comprising a thin copper layer significantly improves imaging with the ion beam while protecting clear regions of the mask from FIB stain. A coating formed of a photosensitive polymer is used to etch opaque defects. While wanted opaque regions adjacent an opaque defect are also etched in this etch step, these created clear defects are then repaired in a subsequent FIB deposition step while a copper coating protects adjacent clear regions from FIB stain.