Abstract: A safety thread scheduler configured to schedule a check thread for a critical thread being run on one of a plurality of execution units, the check thread being a duplicate of the critical thread, wherein the safety thread scheduler is configured to schedule the check thread to begin being run on a second one of the plurality of execution units before the end of a safety time-window for scheduling the check thread. The safety thread scheduler is further configured to allow the check thread, when the check thread is running on the second one of the plurality of execution units, to be interrupted by a further thread and to re-schedule the check thread to be resumed by expiry of a re-scheduling time limit.

Abstract: A memory attribute structure, which is configurable, is used when processing memory access transactions through an execution path of a processing system. The memory attribute structure includes one or more memory address entries. The entries are configurable. Each memory address entry comprising a respective memory address range mapped to a respective priority level of a set of priority levels. A central processing unit is configured to use the memory attribute structure to determine respective priority levels mapped to respective memory addresses of respective memory access transaction, and process the respective memory access transactions based on the respective priority levels.

Abstract: A memory attribute structure comprises one or more memory address entries. Each memory address entry comprising a respective memory address range mapped to a respective priority level. The memory attribute table is used when processing a memory access transaction through an execution path of a processing system. During said processing, a memory address of the memory access transaction is determined. The memory attribute structure is used to determine a priority level mapped to the determined memory address, and the memory access transaction is processed based on the determined priority level.

Abstract: A processing system includes safety thread scheduling circuitry which schedules a check thread, being a duplicate of a critical thread, to be executed on a second of a plurality of parallel execution units other than a first execution unit upon which the critical thread is run. The processor further includes comparison circuitry which will compare a result of the critical thread with a result of the check thread, and raise error signal if the results do not match. The safety thread scheduling circuitry is configured to detect when one of the execution units is idle, and if none of the execution units is detected to be idle by the expiry of a safety time-window, to interrupt a non-critical thread executing on a non-idle one of the execution units and select the non-idle execution unit as the second execution unit to execute the check thread in place of the interrupted thread.

Abstract: A safety thread scheduler configured to schedule a check thread for a critical thread being run on one of a plurality of execution units, the check thread being a duplicate of the critical thread, wherein the safety thread scheduler is configured to schedule the check thread to begin being run on a second one of the plurality of execution units before the end of a safety time-window for scheduling the check thread. The safety thread scheduler is further configured to allow the check thread, when the check thread is running on the second one of the plurality of execution units, to be interrupted by a further thread and to re-schedule the check thread to be resumed by expiry of a re-scheduling time limit.