Abstract: A monolithically integrated circuit is described for multiplexing parallel electrical data into a serial bit stream for transmission by fiber optics to a remote utilization apparatus and for demultiplexing a serial bit stream received from a fiber optics transmission path from a remote source. The integrated circuit uses a separate fiber for transmission and for reception, and in the transmission mode, encodes the data, which is clocked by on chip clocking into a self-clocking three-level code. The integrated circuit utilizes GaAs as the substrate material and is capable of transmitting data at bit rates in excess of 1/2 gHz.

Abstract: The present invention relates to pipeline processors having testing means for identifying malfunctioning modules and for testing the self-testing means themselves. The testing employs the parity check principle and provides an on-line test of memory modules and an off-line test at the processor clock rate of both memory and arithmetic modules. The means for testing include a parity encoder associated with each module and a comparator which couples parity "comparison values" to a priority encoder, operating at the high speed clock rate of the pipeline processor. The test results are then supplied to a RAM, also operating at the clock rate of the pipeline processor. With the test results in the memory, a microcomputer is provided to search the memory at a slower rate for the highest priority failed module.

Abstract: A recursive signal processing apparatus is disclosed which utilizes the slow fluctuations in position of a signal in a recurring intensity-modulated scan for signal enhancement by effectively performing an integration along the signal's past length.