Patents by Inventor Jack Baker

Jack Baker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260350456
    Abstract: An error mitigation method for a quantum computing device can receiving specification data defining a quantum circuit configuration. The method can generate updated configurations by applying different numbers of circuit foldings to the target circuit. These configurations are modified by replacing at least one gate with an implementable quantum gate selected based on a positive component of a generalized quasi-probabilistic decomposition, in which negative components can be excluded. The updated configurations are transmitted to the quantum hardware for execution. The method can then receive experimental expectation values corresponding to the different numbers of circuit foldings. Then, an error-mitigated expectation value is determined by applying an extrapolation between the experimental expectation values and the corresponding circuit folding numbers.
    Type: Application
    Filed: April 27, 2026
    Publication date: November 5, 2026
    Applicant: LG ELECTRONICS INC.
    Inventors: Gaurav Saxena, Pablo Diez Valle, Thi Ha Kyaw, Jack Baker
  • Publication number: 20260340474
    Abstract: An error mitigation method for a quantum computing device can include receiving a quantum circuit configuration and obtaining a set of hardware-implementable quantum gates. The method can determine an inverse noise representation based on a noise representation of a physical implementation of a target gate. A generalized quasi-probabilistic decomposition of the inverse noise representation can be generated, including a positive component and a negative component. An updated quantum circuit configuration can be generated by inserting at least one implementable quantum gate subsequent to the target gate. The inserted gate is selected to correspond to the positive component of the decomposition, while the negative component can be explicitly excluded. The updated quantum circuit configuration is transmitted to the quantum computing device for physical execution, and an error-mitigated expectation value is received based on the execution.
    Type: Application
    Filed: April 24, 2026
    Publication date: October 29, 2026
    Applicant: LG ELECTRONICS INC.
    Inventors: Gaurav Saxena, Thi Ha Kyaw, Jack Baker, Pablo Diez Valle
  • Publication number: 20070251948
    Abstract: A lid for reclosably covering a container is disclosed. In an illustrative implementation, the lid comprises a gripping portion having an annular channel able to removably receive a rim of the container, and a central section bordered by the gripping portion. The lid also has a reclosable flap comprising an arcuate portion of the gripping portion and a bendable portion of the central section. The reclosable flap is bordered on a first side by a first frangible line of separation, and on a second side by a second frangible line of separation, the first and second lines of separation extending inwardly from an edge of the gripping portion. The lid also includes a locking tab forming part of the reclosable flap, extending from the arcuate portion of the gripping portion, and which is able to engage a bottom side of the rim when the reclosable flap is in a closed position.
    Type: Application
    Filed: April 26, 2006
    Publication date: November 1, 2007
    Inventor: Jack Baker
  • Publication number: 20070199882
    Abstract: Methods, apparatus, and kits are described, one method embodiment comprising loading a solids-laden screen into a carriage of a washing enclosure, the solids-laden screen comprising a screen mesh partially obstructed with solids from a well drilling or work-over operation, and spraying a cleaning composition onto first and second sides of the screen while vibrating the screen. Apparatus and kits for practicing the methods are also described. This abstract allows a searcher or other reader to quickly ascertain the subject matter of the disclosure. It will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.
    Type: Application
    Filed: December 30, 2006
    Publication date: August 30, 2007
    Inventor: Jack Baker
  • Publication number: 20050045298
    Abstract: A chip bin for a digester has an upper part through which chips fall freely from an inlet and a lower part within which the chips remain until they are fed to a digester. Steam orifices strike falling chips with steam and disperses the chips over the interior of the chip bin. Further steam heats the chips and drives out non-condensable gas. The lower part of the chip bin is conical. Steam jets aimed down the conical walls propel the chips to an outlet at the bottom and prevent bridging.
    Type: Application
    Filed: August 29, 2003
    Publication date: March 3, 2005
    Applicants: Jack T. Baker, Myles M. Miller
    Inventor: Jack Baker