Patents by Inventor Jack Chien

Jack Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070262434
    Abstract: An electronic component is disclosed including a plurality of semiconductor packages soldered together in a side-by-side configuration. The packages are batch processed on a substrate panel. The panel includes a plurality of through-holes drilled through the panel and subsequently filled with metal such as copper or gold. These filled through-holes lie along the cut line between adjacent packages so that, upon singulation, the filled through holes are cut and a portion of the filled through-holes are exposed at the side edges of the singulated packages. These exposed portions of the filled through-holes form vertical surface mount technology (SMT) pads. After the semiconductor packages are singulated and the SMT pads are defined in the side edges, SMT is used to solder the SMT pads of a first semiconductor package to the respective SMT pads of a second semiconductor package to structurally and electrically couple the two packages together side-by-side.
    Type: Application
    Filed: July 24, 2007
    Publication date: November 15, 2007
    Applicant: SANDISK CORPORATION
    Inventors: Chin-Tien Chiu, Cheemen Yu, Hem Takiar, Jack Chien, Meng-Ju Tsai
  • Publication number: 20070210444
    Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.
    Type: Application
    Filed: March 13, 2006
    Publication date: September 13, 2007
    Inventors: Che-Jung Chang, Chin-Tien Chiu, Cheemen Yu, Hem Takiar, Jack Chien, Ning Liu
  • Publication number: 20070158799
    Abstract: An electronic component is disclosed including a plurality of semiconductor packages soldered together in a side-by-side configuration. The packages are batch processed on a substrate panel. The panel includes a plurality of through-holes drilled through the panel and subsequently filled with metal such as copper or gold. These filled through-holes lie along the cut line between adjacent packages so that, upon singulation, the filled through holes are cut and a portion of the filled through-holes are exposed at the side edges of the singulated packages. These exposed portions of the filled through-holes form vertical surface mount technology (SMT) pads. After the semiconductor packages are singulated and the SMT pads are defined in the side edges, SMT is used to solder the SMT pads of a first semiconductor package to the respective SMT pads of a second semiconductor package to structurally and electrically couple the two packages together side-by-side.
    Type: Application
    Filed: December 29, 2005
    Publication date: July 12, 2007
    Inventors: Chin-Tien Chiu, Cheemen Yu, Hem Takiar, Jack Chien, Meng-Ju Tsai
  • Publication number: 20070108257
    Abstract: A semiconductor package having a low profile is disclosed. In embodiments, a surface mounted component may be mounted directly to the core of the semiconductor package substrate, so that there is no conductive layer, plating layers or solder paste between the component and the substrate core. The surface mounted component may be any type of component which may be surface mounted on a substrate according to an SMT process, including for example passive components and various packaged semiconductors.
    Type: Application
    Filed: November 16, 2005
    Publication date: May 17, 2007
    Inventors: Chih-Chin Liao, Ken Wang, Han-Shiao Chen, Chin-Tien Chiu, Jack Chien, Shrikar Bhagath, Cheemen Yu, Hem Takiar
  • Publication number: 20070096285
    Abstract: A semiconductor die substrate is disclosed for preventing delamination of the die and/or die cracking due to air bubbles trapped beneath the die, and a semiconductor package incorporating the substrate. A solder mask may be laminated on a surface of the substrate which is patterned with one or more passageways, or canals, allowing air bubbles to be expelled from beneath the semiconductor die during the semiconductor package fabrication. The canals may have a variety of shapes, including for example a wavy, undulating shape.
    Type: Application
    Filed: November 2, 2005
    Publication date: May 3, 2007
    Inventors: Chin-Tien Chiu, Jack Chien, Meng-Ju Tsai, Cheemen Yu, Hem Takiar