Patents by Inventor Jack Jan

Jack Jan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8912100
    Abstract: A manufacturing method of a complementary metal oxide semiconductor includes steps as following: providing a semiconductor substrate; forming a metal oxide semiconductor region having an oxide layer, which has a thickness greater than 1 micrometer, on a first surface of the semiconductor substrate; forming the oxide layer as an isolation region of the metal oxide semiconductor region and a heat-isolation region of a poly heater; forming a poly gate of the metal oxide semiconductor region as at least a portion of the poly heater; forming an interlayer dielectric layer; and processing a selenium etching. Under this circumstance, the oxide layer is applied so as to be the isolation region of the metal oxide semiconductor region and a heat-isolation region of the poly heater, the poly gate of the metal oxide semiconductor region is sufficiently utilized as the poly heater, and the heat-dissipation of the poly heater is optimized.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: December 16, 2014
    Assignee: Mosel Vitelic Inc.
    Inventors: Chyan-Huei Wang, Shiu-Fang Lo, Jack Jan
  • Patent number: 5936675
    Abstract: A system for reducing flickers in converting non-interlaced video signals to interlaced video signals is disclosed. The non-interlaced video signals are first modified by two independent adjustable parameters, each having a different weight on the received signals. A FIFO line buffer is used to delay respectively and alternatively the two modified signals to generate a portion of output signals. The final output interlaced signals are generated by combining the delayed signal from the FIFO line buffer with one of the two modified signals. As a result and for the first time, only one FIFO line buffer is used in such system for producing a converted interlaced signal with minimum visual errors in video signal conversions.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: August 10, 1999
    Assignee: AI Tech International Corp.
    Inventors: Sunny Y. Zhang, Jack Jan-Kwe Li