Patents by Inventor Jack Qian

Jack Qian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12557302
    Abstract: Described examples include an integrated circuit having a plurality of nominally identical polycrystalline silicon resistors over a semiconductor substrate. Each of the polysilicon resistors has a resistor body with a first end and a second end, wherein the first end is connected to a current source and the second end is connected to a resistance discriminator. A first proper subset of the resistors have a first resistance, and a second first proper subset of the resistors have a difference second resistance.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: February 17, 2026
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jack Qian, Kemal Tamer San, Guruvayurappan S Mathur
  • Publication number: 20250142843
    Abstract: An integrated circuit including an integrated trench capacitor in a substrate. The trench capacitor includes a plurality of deep trenches extending into the substrate, the trenches filled with a conductive trench-fill material. A first subset of the trenches located in an N-type well and a second subset of the trenches located in a P-type well. A first capacitor terminal connects the conductive trench-fill material in the first subset of trenches and the conductive trench-fill material in the second subset of trenches. A second capacitor terminal connects the N-type well and the P-type well.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 1, 2025
    Inventors: Poornika Gayathri Fernandes, Jack Qian
  • Publication number: 20250081449
    Abstract: An electronic device with a non-volatile memory includes a non-volatile memory (NVM) cell selectively programmable to change a program state from a first state to a second state or to a third state, and may also include a write circuit configured to selectively program the NVM cell to change the program state from the first state to the second state by applying a programming voltage signal to a first source/drain region and to change the program state from the first state to the third state by applying the programming voltage signal to a second source/drain region. A read circuit is configured to identify the program state of the NVM memory cell as one of the first state, the second state, and the third state based on a cell voltage of the non-volatile memory cell.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 6, 2025
    Inventors: Jack Qian, Doug Weiser, Tamer San
  • Publication number: 20250048656
    Abstract: Described examples include an integrated circuit having a plurality of nominally identical polycrystalline silicon resistors over a semiconductor substrate. Each of the polysilicon resistors has a resistor body with a first end and a second end, wherein the first end is connected to a current source and the second end is connected to a resistance discriminator. A first proper subset of the resistors have a first resistance, and a second first proper subset of the resistors have a difference second resistance.
    Type: Application
    Filed: July 31, 2023
    Publication date: February 6, 2025
    Inventors: Jack Qian, Kemal Tamer San, Guruvayurappan S. Mathur
  • Publication number: 20240334692
    Abstract: An integrated circuit comprises a transistor extending into a semiconductor substrate and having a gate structure having major and minor axes parallel to a surface of the semiconductor substrate, and a UV-opaque sheet structure vertically spaced apart from a top surface of the gate structure by a first distance and including an opening, the opening having first and second sides about parallel to the major axis, at least one of the first and second sides laterally spaced apart from a corresponding side of the gate structure by a second distance that is less than or equal to the first distance.
    Type: Application
    Filed: March 31, 2023
    Publication date: October 3, 2024
    Inventors: Zeng Zhang, Jack Qian, Keith Jarreau, Tamer San, Mark Eskew