Patents by Inventor Jack S. T. Huang

Jack S. T. Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bilateral switching device
    Patent number: 4947226
    Abstract: A bilateral switch device capable of conducting a current therethrough established by a first control signal and ended by an alternate control signal and having a low "on" resistance.
    Type: Grant
    Filed: March 3, 1989
    Date of Patent: August 7, 1990
    Assignee: Hoenywell, Inc.
    Inventors: Jack S. T. Huang, Per N. Forssell
  • Resistant transistor
    Patent number: 4937648
    Abstract: A bipolar transistor having higher conductivity semiconductor material in the substrate as compared to the active base region to provide charge generation disturbance protection.
    Type: Grant
    Filed: November 30, 1989
    Date of Patent: June 26, 1990
    Inventor: Jack S. T. Huang
  • Magnetoresistive memory including thin film storage cells having tapered ends
    Patent number: 4731757
    Abstract: A digital memory based on a memory cell having two magnetoresistive ferromagnetic film portions separated by an intermediate layer all of which are gradually narrowed at the ends thereof.Adjacent memory cells are preferrably arranged in a line with conductive junctions therebetween. The magnetic state of each cell can be sensed or set by providing currents of different magnitudes in conductive word lines which overlie the cells. The narrowed ends of the cells reduce demagnetizing effects which occur if the cell ends are abruptly terminated.
    Type: Grant
    Filed: June 27, 1986
    Date of Patent: March 15, 1988
    Assignee: Honeywell Inc.
    Inventors: James M. Daughton, Jack S. T. Huang
  • Semiconductor apparatus
    Patent number: 4148046
    Abstract: A field-effect transistor device is provided having a relatively substantial capability to withstand reverse bias voltages. The device can also be provided having a relatively low "on" condition resistance between the source and drain terminals thereof by virtue of the geometrical design used.
    Type: Grant
    Filed: January 16, 1978
    Date of Patent: April 3, 1979
    Assignee: Honeywell Inc.
    Inventors: Thomas E. Hendrickson, Jack S. T. Huang
  • Monolithic integrated circuit device construction methods
    Patent number: 4089103
    Abstract: Methods for monolithic integrated circuit construction are presented wherein component device-isolating region self-alignment is provided and also, where an element of the device is provided through independent dopant provision steps to allow design flexibility in providing that device element and associated integrated circuit devices. The method is especially applicable to bipolar device construction.
    Type: Grant
    Filed: June 4, 1976
    Date of Patent: May 16, 1978
    Assignee: Honeywell Inc.
    Inventors: Thomas E. Hendrickson, Jack S. T. Huang, Wolfgang Tetzlaff
  • Method for providing semiconductor devices
    Patent number: 4076557
    Abstract: Methods are disclosed for providing self-aligned barrier and conductor regions in conductively connected charge-coupled devices.
    Type: Grant
    Filed: August 19, 1976
    Date of Patent: February 28, 1978
    Assignee: Honeywell Inc.
    Inventors: Jack S. T. Huang, Susumu Kohyama
  • Semiconductor memory cell
    Patent number: 4051464
    Abstract: An electrically alterable semiconductor memory cell is provided wherein a memory cell select line can be operated at a relatively low voltage.
    Type: Grant
    Filed: September 8, 1975
    Date of Patent: September 27, 1977
    Assignee: Honeywell Inc.
    Inventor: Jack S. T. Huang