Abstract: Described examples include an integrated circuit that includes a trench extending into a semiconductor substrate. A silicon nitride body is located within the trench. A polysilicon electrode extends over the silicon nitride body, and a silicon oxynitride layer is located between the silicon nitride body and the polysilicon electrode.

Abstract: The present disclosure generally relates to semiconductor processing for forming a semiconductor device. In an example, semiconductor device includes a semiconductor substrate, a nitride structure, and an oxide layer. The nitride structure is over the semiconductor substrate. The oxide layer is on the nitride structure. The semiconductor substrate includes an implanted doped region laterally proximate the nitride structure and the oxide layer. In another example, a nitride structure is formed over a semiconductor substrate. An oxide layer is formed on the nitride structure. A photoresist is formed over the semiconductor substrate. The photoresist has an opening exposing at least a portion of the oxide layer on the nitride structure. An implantation is performed using the photoresist to form an implanted doped region in the semiconductor substrate.

Abstract: Semiconductor devices including one or more hydrogen-blocking layers are described. In one example, a semiconductor device comprises a semiconductor substrate including a source region, a gate region, a drain region, and a drain access region, where a heterojunction structure is disposed over the semiconductor substrate. The heterojunction structure includes a buffer layer over the semiconductor substrate and a barrier layer over the buffer layer. A p-doped III-N layer is disposed over the barrier layer in the gate region and a gate electrode is formed over the p-doped III-N layer. A first hydrogen-blocking layer is disposed over the gate electrode where the first hydrogen-blocking layer is configured to arrest diffusion of hydrogen into the p-doped III-N layer from a dielectric layer formed after forming the gate electrode.

Abstract: A transistor having a GaN stack on a substrate, an AlGaN barrier layer on the GaN stack, a gate stack including a p-GaN layer on the AlGaN barrier layer, a dielectric layer on a first portion of the p-GaN layer, and a gate electrode on the dielectric layer, and an AlGaN cap layer on a second portion of the p-GaN layer and laterally outward of a portion of the gate electrode. A method of fabricating a semiconductor device includes forming a dielectric layer on a patterned p-GaN layer and forming a gate electrode on the dielectric layer.

Abstract: Semiconductor devices and fabrication methods thereof are described. For example, a semiconductor device includes a semiconductor layer, a source region disposed in the semiconductor layer, a drain region disposed in the semiconductor layer, a gate electrode, and an insulating layer disposed between a portion of the gate electrode and the semiconductor layer. The insulating layer has a first sidewall extending toward the source region and a second sidewall extending toward the drain region, the first sidewall having a first slope and the second sidewall having a second slope greater than the first slope.

Abstract: Semiconductor devices and fabrication methods thereof are described. For example, a semiconductor device includes a semiconductor layer, a source region disposed in the semiconductor layer, a drain region disposed in the semiconductor layer, an insulating layer disposed in the semiconductor layer between the source region and the drain region, and a gate disposed over the semiconductor layer between the source region and the drain region, the gate covering a portion of the insulating layer. The insulating layer has a first sidewall extending toward the source region and a second sidewall extending toward the drain region, the first sidewall having a first slope and the second sidewall having a second slope greater than the first slope.

Abstract: Semiconductor devices with oxidized layer segments in a barrier layer are described. In some examples, a semiconductor device includes a semiconductor substrate, a channel layer over the semiconductor substrate, and a barrier layer over the channel layer. The semiconductor device further includes an oxidized layer including a first segment formed only in a portion of a drain access region of the semiconductor device.

Abstract: An integrated circuit (IC) device including one or more corrugated channel structures formed in or over a semiconductor substrate, where a corrugated channel structure includes a first sidewall, a second sidewall and a top surface. In an example, the corrugated channel structure is provided with a substantially uniform distribution profile of a dopant across a horizontal plane from the first sidewall to the second sidewall.

Abstract: An integrated circuit (IC) device including one or more corrugated channel structures formed in or over a semiconductor substrate, where a corrugated channel structure includes modified first and second sidewalls and a modified top surface. In an example, the corrugated channel structure is provided with a substantially uniform distribution profile of a dopant across a horizontal plane from the modified first sidewall to the modified second sidewall.

Abstract: Described examples include an integrated circuit including a dielectric layer located over a top surface of a semiconductor substrate and extending over a gate electrode. A trench extends from a top surface of the dielectric layer into the substrate. A conductive trench electrode is within the trench, and a dielectric liner is between the trench electrode and the semiconductor substrate. A cap dielectric layer is located on the conductive trench electrode and on the dielectric layer, and extends over the gate electrode.

Abstract: An integrated circuit (IC) device including one or more corrugated channel structures formed in a top portion of a semiconductor substrate, where a corrugated channel structure includes a first sidewall, a second sidewall and an upper portion. In an example, the corrugated channel structure is provided with a substantially uniform distribution profile of a dopant across a horizontal plane from the first sidewall to the second sidewall.

Abstract: Semiconductor devices including a nitrogen doped field relief dielectric layer are described. The microelectronic device comprises a substrate including a body region having a first conductivity type and a drain drift region having a second conductivity type opposite the first conductivity type; a gate dielectric layer on the substrate, the gate dielectric layer extending over the body region and the drift region and a doped field relief dielectric layer on the drift region. Doping of the field relief dielectric layer with nitrogen raises the dielectric constant of the field relief dielectric above that of pure silicon dioxide. Increasing the dielectric constant of the field relief dielectric layer may improve channel hot carrier performance, improve breakdown voltage, and reduce the specific on resistance of the microelectronic device compared to a microelectronic device of similar size with a field relief dielectric which is not doped with nitrogen.

Abstract: A process for treatment of polyester fabrics imparts improved characteristics to the fabric, including improved moisture wicking, soil-release, and soil-redeposition properties, and less static cling. The process comprises treatment of the fabric with a caustic solution, preferably in the presence of an appropriate catalyst, followed by the application of a polyester copolymer, the copolymer having both hydrophobic and hydrophilic groups. The process treats the entire fabric, not just the surface, and provides a product sufficiently comfortable to be used for intimate apparel and active sportswear.

Abstract: An improved process is provided for the transfer printing of textile materials. In the process of this invention a heat sublimable dyestuff is printed onto a carrier sheet. The carrier sheet is then brought in contact with the textile material to be printed. Sufficient heat and pressure is applied for a suitable dwell time causing sublimation of at least a substantial portion of the dyestuff from the carrier sheet. The volatilized dyestuff is then transferred and deposited on the surface of the textile material to be printed. The carrier sheet is then separated from the textile material. The printed surface of the textile material is then heated to at least the sublimation temperature of the dyestuff in substantial absence of a convective gas flow, other than the volatilized dyestuff and maintained at this temperature until a given desired degree of resublimation and deposition of the dyestuff from the surface of the textile material to the interior of the textile material is obtained.