Abstract: A backplane test system is provided that uses a pressed or deposited resistive film and infra-red (IR) imaging to visualize and quantify the current drive of pixels. In one form, the system is used for measuring organic light-emitting-diode (OLED) backplanes or other current-actuated-display (CAD) backplanes.

Abstract: An embodiment is a method and apparatus to fabricate a flat panel display. A poly-last structure is formed for a display panel using an amorphous silicon or amorphous silicon compatible process. The poly-last structure has a channel silicon precursor. The display panel is formed from the poly-last structure using a polysilicon specific or polysilicon compatible process.

Abstract: An embodiment is a method and apparatus to fabricate a flat panel display. A poly-last structure is formed for a display panel using an amorphous silicon or amorphous silicon compatible process. The poly-last structure has a channel silicon precursor. The display panel is formed from the poly-last structure using a polysilicon specific or polysilicon compatible process.

Abstract: An embodiment is a method and apparatus to fabricate a flat panel display. A poly-last structure is formed for a display panel using an amorphous silicon or amorphous silicon compatible process. The poly-last structure has a channel silicon precursor. The display panel is formed from the poly-last structure using a polysilicon specific or polysilicon compatible process.

Abstract: A backplane test system is provided that uses a pressed or deposited resistive film and infra-red (IR) imaging to visualize and quantify the current drive of pixels. In one form, the system is used for measuring organic light-emitting-diode (OLED) backplanes or other current-actuated-display (CAD) backplanes.

Abstract: An embodiment is a method and apparatus to fabricate a flat panel display. A poly-last structure is formed for a display panel using an amorphous silicon or amorphous silicon compatible process. The poly-last structure has a channel silicon precursor. The display panel is formed from the poly-last structure using a polysilicon specific or polysilicon compatible process.

Abstract: A backplane circuit includes an array of organic thin-film transistors (OTFTs), each OTFT including a source contact, a drain contact, and an organic semiconductor region extending between the source and drain contacts. The drain contacts in each row are connected to an address line. The source and drain contacts and the address lines are fabricated using a multi-layer structure including a relatively thick base portion formed of a relatively inexpensive metal (e.g., aluminum or copper), and a relatively thin contact layer formed of a high work function, low oxidation metal (e.g., gold) that exhibits good electrical contact to the organic semiconductor, is formed opposite at least one external surface of the base, and is located at least partially in an interface region where the organic semiconductor contacts an underlying dielectric layer.

Abstract: Controlled overetching is utilized to produce metal patterns having gaps that are smaller than the resolution limits of the feature patterning (e.g., photolithography) process utilized to produce the metal patterns. A first metal layer is formed and masked, and exposed regions are etched away. The etching process is allowed to continue in a controlled manner to produced a desired amount of over-etching (i.e., undercutting the mask) such that an edge of the first metal layer is offset from an edge of the mask by a predetermined gap distance. A second metal layer is then deposited such that an edge of the second metal layer is spaced from the first metal layer by the predetermined gap distance. The metal gap is used to define, for example, transistor channel lengths, thereby facilitating the production of transistors having channel lengths defined by etching process control that are smaller than the process resolution limits.

Abstract: An apparatus integrating electrostatically actuated MEMS devices and high voltage driver (actuator) electronics on a single substrate, where the driver electronics utilize offset-gate high voltage thin-film transistors (HVTFTs) that facilitate the transmission of high actuating voltages using relatively low control voltages, thereby facilitating the formation of large arrays of electrostatically-actuated MEMS devices. The driver circuit is arranged such that the high actuating voltage is applied to an actuating electrode of the actuated MEMS device and drain electrode of the HVTFT when the HVTFT is turned off, thereby minimizing dielectric breakdown. When the HVTFT is turned on in response to the relatively low control voltage, the high actuating voltage is discharged to ground from the drain (offset) electrode to the source (not offset) electrode.

Abstract: A new process to form a polycrystalline silicon film using a polycrystalline silicon-germanium (poly-Si.sub.1-x Ge.sub.x) capping film to "seed" crystallization of an amorphous silicon film on an upper surface of a substrate. The polycrystalline silicon film has no nucleation sites and a greater number of grain boundaries in the region near the polycrystalline silicon upper surface than in the region near the polycrystalline silicon and substrate upper surface interface. This indicates that crystallization and crystal growth occurred from the polycrystalline silicon upper surface and proceeded in a direction towards the substrate upper surface.

Abstract: A new polycrystalline silicon film which has been crystallized using a polycrystalline silicon-germanium (poly-Si.sub.1-x Ge.sub.x) capping film to "seed" crystallization of an amorphous silicon film on an upper surface of a substrate. The polycrystalline silicon film has no nucleation sites and a greater number of grain boundaries in the region near the polycrystalline silicon upper surface than in the region near the polycrystalline silicon and substrate upper surface interface. This indicates that crystallization and crystal growth occurred from the polycrystalline silicon upper surface and proceeded in a direction towards the substrate upper surface.

Abstract: A conductive line in a thin-film structure such as an AMLCD array includes molybdenum and chromium so that it can be processed in a manner similar to chromium but has a greater conductivity than chromium due to the molybdenum. The conductive line can be produced by physical vapor deposition of a layer of a molybdenum-chromium (MoCr) alloy, which can then be masked and etched using photolithographic techniques in a manner similar to chromium. Proportions between 15 and 85 atomic percent of molybdenum can be processed more easily than pure molybdenum and are more conductive than pure chromium. Lines with between 40 and 60 atomic percent molybdenum can be used with a margin of error. To produce a tapered conductive line, sublayers of MoCr alloys with different etch rates can be produced and etched.

Abstract: A feature in a thin-film structure such as an AMLCD array has an edge with a tapered sidewall profile, reducing step coverage problems. The feature can be produced by producing a layer in which local etch rates vary in the thickness direction of the layer. The layer can then be etched to produce the feature with the tapered sidewall profile. The layer can be produced by physical vapor deposition. The layer can, for example, includes sublayers with different etch rates, either due to different atomic proportions of constituents or due to different etchants. Or local etch rates can vary continuously as a result of changing deposition conditions. Differences in etch rates or differences in etchant mixtures can be used to obtain a desired angle of elevation.

Abstract: The present invention is a novel multilayered structure comprising alternating layers of a base metal and a metal selected from a group of barrier metals. The base metal, in any given layer, is deposited to a thickness less than its critical thickness--a thickness beyond which hillocks are more likely to form for a given temperature. Between each such layer of base metal, a layer of barrier metal is interposed. The intervening layer of barrier metal acts to suppress the formation of hillocks in the base metal.

Abstract: A thin-film structure on an insulating substrate includes an array of binary control units with an area of at least 90 cm.sup.2 and a density of at least 60 binary control units per cm. One implementation has an area of approximately 510 cm.sup.2, a diagonal of approximately 33 cm, and a total of approximately 6.3 million binary control units. Each binary control unit has a lead for receiving a unit drive signal, to which it responds by causing presentation of a segment of images presented by the array. Each binary control unit can present a segment with either a first color having a maximum intensity or a second color having a minimum intensity. Each binary control unit's unit drive signal causes the binary control unit to present its first and second colors. The substrate can be glass. Each binary control unit can include an amorphous silicon thin-film transistor (TFT) and a storage capacitor. Each binary control unit can be square.