Patents by Inventor Jacky Kuo

Jacky Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10057148
    Abstract: A computational method and system for estimating port delays in a network may use a data-driven estimation with quadratic programming based on available network path data that is already collected. In this manner, port delays for each individual port in the network may be estimated without having to measure each individual port using sensors.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: August 21, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Xi Liu, Max Simmons, Calvin Wan, Jacky Kuo, Vamseedhar Reddyvariraja
  • Patent number: 10050853
    Abstract: A computational method and system for identifying bad ports in a network may use a neural network learning function based on available network path data that is already collected. In this manner, bad ports in the network may be identified without having to measure each individual port using sensors.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: August 14, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Xi Liu, Max Simmons, Calvin Wan, Jacky Kuo, Vamseedhar Reddyvariraja
  • Publication number: 20180062963
    Abstract: A computational method and system for estimating port delays in a network may use a data-driven estimation with quadratic programming based on available network path data that is already collected. In this manner, port delays for each individual port in the network may be estimated without having to measure each individual port using sensors.
    Type: Application
    Filed: August 25, 2016
    Publication date: March 1, 2018
    Inventors: Xi Liu, Max Simmons, Calvin Wan, Jacky Kuo, Vamseedhar Reddyvariraja
  • Publication number: 20180062958
    Abstract: A computational method and system for identifying bad ports in a network may use a neural network learning function based on available network path data that is already collected. In this manner, bad ports in the network may be identified without having to measure each individual port using sensors.
    Type: Application
    Filed: August 25, 2016
    Publication date: March 1, 2018
    Inventors: Xi Liu, Max Simmons, Calvin Wan, Jacky Kuo, Vamseedhar Reddyvariraja
  • Publication number: 20050033622
    Abstract: A computer implemented method uses a system (100) for managing meetings. The system (100) has, a database (104) with data fields for entering a meeting definition of a future meeting as meeting definition data; a computer memory (106) storing the data for retrieval by the database (104); and an auto-mailer (108) sending an encrypted and read only meeting definition document and meeting reminders that are generated by the database (104) and sent by the auto-mailer (108) to notify meeting members identified by the data about a future meeting described by the data.
    Type: Application
    Filed: August 6, 2003
    Publication date: February 10, 2005
    Inventors: Jacky Kuo, Albert Chang, K. P. Lee, Konrad Young, S. S. Lin, David Lai
  • Patent number: 6093646
    Abstract: The present invention provides a manufacturing method for a poly film with an anti-reflection rough surface is provided. The method comprises steps of, at first, a thin film is formed over a substrate, and a amorphous silicon layer is formed over the thin film. Next, in situ a first annealing procedure is performed over the amorphous silicon layer. The amorphous silicon layer is changed into a polysilicon layer with the anti-reflection rough surface. Next, in situ a second annealing procedure is selectively performed. The polysilicon layer with the anti-reflection rough surface is doped by reacting with a gas induced. Then, the thin film and the polysilicon layer with the anti-reflection rough surface is defined, whereby the poly film with an anti-reflection rough surface is formed over the substrate.
    Type: Grant
    Filed: March 2, 1998
    Date of Patent: July 25, 2000
    Assignee: United Semiconductor Corp.
    Inventors: Jacky Kuo, Mark Lin, Steven Hsiao
  • Patent number: 5998286
    Abstract: The method of the present invention includes forming a MOS on a semiconductor substrate. Subsequently, a silicon-rich metal silicide layer is deposited on the MOS and substrate by using chemical vapor deposition to act as a silicon material source. Then, a thermal process is carried out to separate a portion of the silicon out of the metal silicide layer, thereby forming a silicon layer on top of the gate of the MOS, source/drain. The nest step is to remove the metal suicide layer. A self-aligned metal silicide layer is formed on the silicon layer.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: December 7, 1999
    Assignee: United Semiconductor Circuit Corp.
    Inventors: Shu-Jen Chen, Jacky Kuo, Jiunn-Hsien Lin, Chih-Ching Hsu