Patents by Inventor Jacob Antonius Van Der Pol

Jacob Antonius Van Der Pol has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090079272
    Abstract: A down converter includes an integrated circuit, which includes a control FET (CF) and a synchronous rectifier FET (SF). The control FET is a lateral double-diffused (LDMOS) FET, and the conductivity-type of the LDMOS FET and the conductivity-type of the substrate are of the same type.
    Type: Application
    Filed: October 28, 2008
    Publication date: March 26, 2009
    Inventors: Adrianus Willem Ludikhuize, Jacob Antonius Van der Pol, Raymond J. Grover
  • Patent number: 7459750
    Abstract: A down converter includes an integrated circuit, which includes a control FET (CF) and a synchronous rectifier FET (SF). The control FET is a lateral double-diffused (LDMOS) FET, and the conductivity-type of the LDMOS FET and the conductivity-type of the substrate are of the same type.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: December 2, 2008
    Assignee: NXP B.V.
    Inventors: Adrianus Willem Ludikhuize, Jacob Antonius Van Der Pol, Raymond J. Grover